Patent
Method and apparatus for randomizing memory site usage
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TLDR
In this paper, a method for randomly scrambling the physical address of a block of data, within a memory subject to data site deterioration, by utilizing an auxiliary correspondence memory to pair each logical input/output address with a physical memory address at a random time.Abstract:
A method for randomly scrambling the physical address of a block of data, within a memory subject to data site deterioration, by utilizing an auxiliary correspondence memory to pair each logical input/output address with a physical memory address at a random time. Apparatus for implementing the novel method is also disclosed.read more
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Patent
Shift-shuffle memory system with rapid sequential access
Alfred V. Aho,Jeffrey D. Ullman +1 more
TL;DR: A shift register memory has interconnections among its internal stages permitting stored data to be rearranged in two different ways as discussed by the authors, similar to the shuffling of cards in a deck when shuffled.
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Data processor reorder random access memory
TL;DR: Random access memory addressing system for mapping data into a memory according to one schema and retrieving the stored data according to another schema using minimum storage locations is proposed in this paper, which is a RMA addressing system.