Patent
Model-based two-dimensional interpretation filtering
TLDR
In this paper, an aerial image is sampled and its gradient computed at evaluation points on the 2D feature, which can then be used to predict a feasible shape or curvature for the feature.Abstract:
Complex layout features, especially two-dimensional (2D) features such as jogs and corners, are more susceptible to photo-resist pinching and bridging, even with the use of optical proximity correction. These problems may arise due to unrealistic targets, e.g. square corners, thereby resulting in excessively aggressive correction in the vicinity of these 2D features. To provide a more realistic target, an aerial image can be sampled and its gradient computed at evaluation points on the 2D feature. The aerial image contains spatial information about the local pattern and the interaction of the pattern with the manufacturing process. This information can be used to predict a feasible shape or curvature for the 2D feature. The predicted shape can then be used to retarget the 2D feature based on realistic process capabilities.read more
Citations
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Patent
Pattern data correction method, pattern checking method, pattern check program, photo mask producing method, and semiconductor device manufacturing method
TL;DR: In this article, a pattern data correction method is described, which involves preparing an integrated circuit pattern, setting a tolerance to the pattern that is allowable error range when the pattern is transferred on a substrate, creating a target pattern within the tolerance, and making correction for the target pattern to make a first correction pattern under a predetermined condition.
Patent
Method and apparatus for insertion of filling forms within a design layout
Hongmei Liao,Illam Pakkirisamy +1 more
TL;DR: In this paper, a method and apparatus for insertion of filling forms within a design layout are described, and multiple filling forms are inserted within the circuit design layout, each filling form being configured to eliminate a corresponding jog area within the design layout.
Patent
Semiconductor device pattern creation method, pattern data processing method, pattern data processing program, and semiconductor device manufacturing method
TL;DR: In this article, a correction target pattern having a size not more than a threshold value is extracted from first design data containing a pattern of a semiconductor integrated circuit, and the second characteristic is calculated on the basis of the second design data.
Patent
Semiconductor device pattern creation method, pattern data processing program, and semiconductor device manufacturing method
TL;DR: In this article, a correction target pattern having a size not more than a threshold value is extracted from first design data containing a pattern of a semiconductor integrated circuit, and the second characteristic is calculated on the basis of the second design data.
Patent
Photomask, focus measurement apparatus and focus measurement method
TL;DR: In this paper, a test photomask includes a first mask pattern and a second mask pattern formed at the center portion of the first mask patterns thereon, which is a pattern with light condensing effect and a nature in which exposure-dose amount to a transfer object varies in dependence on a focus variation.
References
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Patent
Selection of evaluation point locations based on proximity effects model amplitudes for correcting proximity effects in a fabrication layout
Christophe Pierrat,Youping Zhang +1 more
TL;DR: In this article, a dissection length parameter is derived based on a profile of amplitudes output by a proximity effects model along a transect, and then it is determined how to correct at least a portion of the first edge for proximity effects based on an analysis at the evaluation point.
Patent
Method and apparatus for mixed-mode optical proximity correction
TL;DR: In this paper, a semiconductor layout testing and correction system is described, which combines both rule-based optical proximity correction and model-based proximity correction in order to test and correct semiconductor layouts.
Patent
Dissection of corners in a fabrication layout for correcting proximity effects
Christophe Pierrat,Youping Zhang +1 more
TL;DR: In this paper, a technique for forming a fabrication layout for a physical design layer, such as a design for an integrated circuit, includes identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects.
Patent
Method for correcting a mask pattern, a computer program product, a method for producing a photomask, and method for manufacturing a semiconductor device
Satoshi Tanaka,Soichi Inoue +1 more
TL;DR: In this paper, a computer implemented method for correcting a mask pattern is described, which includes: preparing a designed mask pattern, obtaining a rough corrected mask pattern from the original mask pattern by applying a rough correction, and obtaining a precision corrected mask mask pattern using a model based correction method with a precision model that simulates a transferred image of an exposure apparatus.
Patent
Gradient method of mask edge correction
TL;DR: In this article, a method and apparatus for making mask edge corrections using a gradient method for high density chip designs is presented, where a newly defined cost function is defined for mask edge correction.