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MOSFET circuitry for integrated chips interfacing with higher voltage devices

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TLDR
In this article, the output terminal of a MOSFET chip is biased to a voltage in excess of the breakdown voltage of the chip, and a control transistor and a biased transistor are connected inside the chip between the terminal and ground, so that reduced bias is effective across its main electrodes.
Abstract
An output terminal of a MOSFET chip is biased to a voltage in excess of the breakdown voltage of a MOSFET; a control transistor and a biased transistor are connected inside of the chip between the terminal and ground, so that for the nonconductive state of the control transistor only a reduced bias is effective across its main electrodes. The output terminal is connected, e.g., to the control circuit for a discharge device and for operating the control circuit between a relatively high firing voltage and a somewhat lower level.

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MIS switching circuit capable of enduring high voltage

TL;DR: In this paper, a switching circuit capable of enduring a high voltage, comprises a switching FET, one or more FETs connected in series to the switch and a load connected between the drain of the FET and the high voltage source.
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References
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Patent

Fet interface circuit

G Luckett, +1 more
TL;DR: In this paper, the authors describe an FET circuit for converting bipolar transistor signal levels to field effect transistor (FET) signal levels and include a capacitor, a signal FET, a load FET and a feedback FET.
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Eisenberg M F, +1 more
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Sustainer voltage generators for driving gaseous discharge display panels

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