Multi-input josephson decoder circuit

TLDR: In this paper, a 6-to-64 decoder with 64 kinds of outputs is presented, with six address inputs A0, A1, A2, A3, A4, A5, and A6.

Abstract: PURPOSE:To constitute a multi-input OR type decoder, by adding one or more current flip flip circuits to the previous stage of an OR type decoder circuit consisting of one stage of current (transfer type) flip flop circuit. CONSTITUTION:A 6-to-64 decoder, with which 64 kinds (2 =64 combinations) of outputs are selected by using six address inputs A0, A1, A2, A3, A4, and A5 is shown here. Firstly, address signals the inverse of A0, the inverse of A1, and the inverse of A2 and the inverse of A3, the inverse of A4, and the inverse of A5 are respectively given to the two preceding-stage current flip flops and each output is given to the OR gate of the final-stage current flip flop. When the output of this decoder is fetched from the branch on the OR gate side of the final-stage current flip flop 1, the A0, A1, A2, A3, A4, and A5 are obtained. When the number of the preceding-stage current flip flop is increased in such way, the number of addresses can be increased.