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Proceedings ArticleDOI

New directions in aerospace packaging

John W. Kanz
- pp 427-431
TLDR
In this article, the potential impact of new commercial/industrial packaging brief 1 y reviewed, and the problems encountered in implementing the most prominent of these, the leadless chip carrier, is detailed together with proposed solutions.
Abstract
Electronic packaging is in the midst of an international revolution. Higher device lead counts and potder dissipation accentuate system space, weight, testability, and cost constraints. While commercial /industrial electronics moves toward a new generation of sophisticated plastic encapsulated surface mounted devices, the military/ aerospace designer still has a more restricted set of choices. Device packages suitable for aerospace applications will be reviewed, and relative advantages and disadvantages described. Problems encountered in implementing the most prominent of these, the leadless chip carrier, will be detailed together with proposed solutions. National and international standardization activities will be discussed, and the potential impact of new commercial/industrial packaging brief 1 y reviewed.

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Citations
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Journal ArticleDOI

Toward Holistic Design of Spatial Packaging of Interconnected Systems with Physical Interactions (SPI2)

TL;DR: In this article , a vision of a holistic SPI2 design approach needed to develop next generation automated design methods capable of rapidly producing viable SPI2 design candidates is presented. But the authors do not discuss the practical challenges of such a framework.
References
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Journal ArticleDOI

Forces, Moments, and Displacements During Thermal Chamber Cycling of Leadless Ceramic Chip Carriers Soldered to Printed Boards

TL;DR: In this paper, the in-plane deformation and bending of printed wiring boards (PWBs) and CCCs was investigated and it was found that below room temperature, most of the expansion mismatch is accommodated by "bi-metallic strip" type bending of the PWB and the CCC.
Journal ArticleDOI

The Effect of High Dissipation Components on the Solder Joints of Ceramic Chip Carriers Attached to Thick Film Alumina Substrates

TL;DR: In this paper, the effects of power cycling and powered high temperature storage on chip carriers attached to thick film alumina substrates are compared with those of conventional temperature cycling and high temperature storages.
Journal ArticleDOI

Clad Metal Circuit Board Substrates for Direct Mounting of Ceramic Chip Carriers

TL;DR: In this article, a new approach for achieving rugged, large area PCBs, incorporating thermal planes and the necessary thermal expansion match to chip carriers is described in this paper, based upon the use of a clad metal core substrate material fabricated from high conductivity copper and low thermal expansion rate Invar TM, a 36% nickel-64% iron alloy.
Journal ArticleDOI

High Pinout IC Packaging and the Density Advantage of Surface Mounting

TL;DR: In this paper, the Schmidt routability analysis methodology is used to compute packaged circuit pack level gate densities as a function of various IC, IC package, and printed wiring board (PWB) technology options.
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