Patent
Phase locked loop circuit responding to supplied signal frequency
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TLDR
In this paper, a phase-locked loop circuit is proposed for receiving a first signal having a given frequency and producing a second signal which has the same frequency and is synchronous with the first signal.Abstract:
A phase locked loop circuit, which is arranged for receiving a first signal having a given frequency and producing a second signal which has the same frequency and is synchronous with the first signal, comprises control voltage generating means for generating a control voltage responding to a phase difference and a frequency difference between the first and second signals, a voltage controlled oscillator containing a ring oscillator having a multiplicity of the rows of inverters for producing a frequency output which is primarily determined by the control voltage, and a quantity-of-rows changing means for automatically changing the quantity of the inverters rows in the ring oscillator according to the control voltage.read more
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Automatic selection of an operating frequency in a low-gain broadband phase lock loop system
Julio R. Estrada,Ray A. Mentzer +1 more
TL;DR: In this paper, a broadband low-gain system for automatically frequency-locking a signal where the system uses digital and analog devices and techniques is presented, including a comparator, an up/down counter, a digital-to-analog converter, a decoder, a ring oscillator and a downcounter.
References
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Patent
FM demodulation device and FM modulation device employing a CMOS signal delay device
TL;DR: In this article, a signal delay device consisting of an input terminal to which a binary input signal to be delayed is applied, an output terminal from which a delayed signal is derived and power voltage supply terminals to which operation power voltages are applied.