Patent
Process for forming an epitaxial layer having portions of different thicknesses
Reads0
Chats0
TLDR
In this article, the epitaxial layer is grown by a first epoxial deposition phase selectively over only the silicon dioxide free regions of the front surface of the chip and then removed in situ by baking in hydrogen.Abstract:
An integrated circuit device uses a silicon chip having an epitaxial layer which has two portions of different thicknesses in which are formed separate junction transistors of different characteristics. In the growth of the epitaxial layer there is first formed on the front surface of the chip a localized sacrificial silicon dioxide layer removable in situ by baking in a reducing atmosphere. Then an epitaxial layer is grown by a first epitaxial deposition phase selectively over only the silicon dioxide free regions of the front surface of the chip. The sacrificial silicon dioxide layer is then removed in situ by baking in hydrogen. There is then resumed blanket growth of the epitaxial layer by a second epitaxial deposition phase. In the resulting chip, a large geometry junction transistor of relatively low switching speed and moderately high breakdown voltage (compared to 12 volts) is formed in the thicker epitaxial portion and a small geometry junction transistor of high switching speed and lower breakdown voltage is formed in the thinner epitaxial portion.read more
Citations
More filters
Patent
Method of manufacturing an enclosed transceiver
TL;DR: In this paper, a method of manufacturing an enclosed transceiver, such as a radio frequency identification (RFID) tag, is presented, where the tag comprises an integrated circuit (IC) chip, and an RF antenna mounted on a thin film substrate powered by a thin-film battery.
Patent
Tamper resistant smart card and method of protecting data in a smart card
TL;DR: In this article, the authors proposed a method of protecting data in a smart card from unauthorized access, the method comprising providing a housing defined by first and second housing portions, employing a volatile memory in the smart card for storing the data, and supporting the volatile memory from the first housing portion; providing a power supply in the housing, the power supply maintaining the data in the volatile memories while the power input power supply is connected to volatile memory; and connecting the power output power supply to the variable memory using a conductor supported by and movable with the second housing portion.
Patent
Varying the thickness of the surface silicon layer in a silicon-on-insulator substrate
TL;DR: In this article, a silicon-on-insulator structure comprising a semiconductor substrate (e.g., SiO 2 36), a buried insulator layer, and a surface silicon layer has two or more predetermined thicknesses is described.
Patent
Electronic communication devices, methods of forming electrical communication devices, and communications methods
TL;DR: In this article, an electronic communication device adapted to receive electronic signals includes: a housing comprising a substrate and an encapsulant; an integrated circuit provided within the housing and comprising transponder circuitry operable to communicate an identification signal responsive to receiving a polling signal; an antenna provided within a housing and being coupled with the transponders.
Patent
Formation of composite monosilicon/polysilicon layer using reduced-temperature two-step silicon deposition
TL;DR: In this paper, a reduced-temperature two-step silicon deposition performed at different silicon sources is used in forming a composite monosilicon/polysilicon layer (20/24/26) on a body that contains a monosILicon region (10) and an adjoining dielectric regin (12).
References
More filters
Patent
Selective area double epitaxial process for fabricating silicon-on-insulator structures for use with MOS devices and integrated circuits
TL;DR: In this paper, a process for preparing selectively doped and recrystallized silicon-on-insulator semiconductor wafers is described, where successive amorphizing and annealing sequences are utilized to optimize the defect structure and doping of multiple regions or islands of the silicon on an insulator substrate.
Patent
Method for forming uniformly thick selective epitaxial silicon
TL;DR: In this article, the first and second portions of a substrate were subject to a silicon-source gas and a predetermined concentration of chloride at a predetermined temperature, and the chloride concentration was selected so as to create a substantially equally thick monocrystalline silicon deposit on each of the substrate portions.
Patent
Method of producing monocrystal on insulator
TL;DR: In this article, a method for producing monocrystal on insulator is disclosed, where an epitaxial layer is created on the single crystal substrate by direct deposition of the monocrystals layer, or through epitaxia growth induced after a polycrystal or amorphous layer has been deposited upon the substrate.
Patent
Method of fabricating semiconductor integrated circuit device utilizing selective etching and epitaxial refill
Jun-ichi Nishizawa,M. Shimbo +1 more
TL;DR: In this paper, an epitaxial layer is grown from a Si-H-Cl system on the surface of the substrate having the surface depressions formed therein, and additional regions of the semiconductor integrated circuit are formed in the epitaxially layer regions of different thicknesses so as to complete the device.
Patent
Method of manufacturing a semiconductor device utilizing a mono-polycrystalline deposition on a predeposited amorphous layer
TL;DR: In this paper, a method of manufacturing a semiconductor device is provided in which a masking layer is formed on a part of a surface of a monocrystalline semiconductor body and the body is then subjected at the side of the surface to an epitaxial treatment from a gaseous phase.