Patent
Serial architecture for memory module control
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TLDR
An expandable memory system as discussed by the authors includes a central memory controller and one or more plug-in memory modules, each memory module having an on-board memory module controller coupled in a serial network architecture which forms a memory command link.Abstract:
An expandable memory system including a central memory controller and one or more plug-in memory modules, each memory module having an on-board memory module controller coupled in a serial network architecture which forms a memory command link Each memory module controller is serially linked to the central memory controller. The memory system is automatically configured by the central controller, each memory module in the system is assigned a base address, in turn, to define a contiguous memory space without user intervention or the requirement to physically reset switches. The memory system includes the capability to disable and bypass bad memory modules and reassign memory addresses without leaving useable memory unallocated.read more
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References
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Patent
Self configuring computer network with automatic bus exchange of module identification numbers and processor assigned module numbers
TL;DR: In this article, the closest interface card of each local bus responds by transmitting information from its identification ROM to the requesting local processor, which then assigns an address to the closest interfaces card, and then automatically sets circuitry that enables the next closest interfaces to respond to the initial address.
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Self-configuring modular computer system with automatic address initialization
TL;DR: An initial polling sequence for configuring a modular computer system employing a system bus for interconnecting the CPU and various modules attached to the bus is described in this article. But it does not specify a polling sequence.
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Automatic sizing memory system with multiplexed configuration signals at memory modules
TL;DR: In this article, a configuration status register can include several independent status registers, each corresponding to a different memory module, each of the status registers can contain a base address identifying the starting address of each memory module.
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TL;DR: In this paper, a modular minicomputer is provided which is assembled from a central processor unit module and a plurality of memory modules, and small calculators on the memory modules are so interlocked that when the computer is powered up, memory address boundaries are automatically calculated.
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TL;DR: In this paper, a data processing system in which any one of a plurality of different or similar interface circuit cards can be located into one of the slots without pre-assignment is described.