Patent
Video signal field/frame storage system
TLDR
In this paper, a video signal processing system which employs a frame memory having a single output is operated to provide both field and frame delayed signals, and the frame memory is operated in a serial mode at twice the video signal sample rate.Abstract:
A video signal processing system which employs a frame memory having a single output is operated to provide both field and frame delayed signals. The frame memory is operated in a serial mode at twice the video signal sample rate. Video samples are input to the memory on alternate stages and alternate samples output from the memory are routed back into the vacant memory stages. Alternate samples output from the frame memory correspond to field and frame delayed samples.read more
Citations
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Patent
Video editing system operator interface for visualization and interactive control of video material
TL;DR: In this article, an operator interface for a video editing system provides a visual sense of the content of video sequences, as well as their length, while also providing enhanced interactive control of locations and time alignments of the video.
Patent
System for creating a high resolution image from a sequence of lower resolution motion images
TL;DR: In this paper, a robust system, adaptive to motion estimation accuracy, for creating a high resolution image from a sequence of lower resolution motion images produces a mapping transformation for each low resolution image to map pixels in each low-resolution image into locations in the high-resolution images.
Patent
Video signal gradation corrector
TL;DR: In this article, a histogram operating circuit includes an average luminance level detecting circuit, which is used to prevent the destruction of the gradation of the black side and the floating of the luminance levels of the white side.
Patent
Video interface system utilizing reduced frequency video signal processing
TL;DR: In this paper, a video interface system which samples an input video signal to capture a subset of pixels from first and second frames of the signal is presented, and a display interface unit reads the stored pixels out of the frame buffer for transfer to a flat panel display.
Patent
Dual band progressive scan television system with noise reduction
TL;DR: In this article, a non-interlaced video input signal provided by a source (510) is applied to a first processor (20, 30, 40) for producing a first video output signal (Y10) having a high frequency component (Y11) subjected to coring and having a first low frequency component subjected to frame recursive filtering.
References
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Patent
Raster memory manipulation apparatus
TL;DR: An apparatus for manipulating and displaying raster images stored in a memory system under computer control is described in this paper, where a function unit combines new display data presented to the apparatus with display data already stored in memory.
Patent
Television display system with reduced line-scan artifacts
TL;DR: In this paper, a flat-field television image having reduced visibility of horizontal scan lines is generated by receiving first and second fields of interlaced video and progressively generating a scanned image within a time for one incoming field.
Journal ArticleDOI
Digital Techniques for Reducing Television Noise
TL;DR: The theory and application of digital coring as well as the implementation of different types of signal averaging processes to improve the subjective quality of television pictures are presented.
Journal ArticleDOI
A Digital Noise Reducer for Encoded NTSC Signals
TL;DR: The noise reduction system described in this paper uses a digital frame store operating as an adaptive recursive filter, under the control of a motion detector employing comb filtering and signal modification.
Patent
Image resolution enhancement method and apparatus
TL;DR: In this article, a frame of information to be displayed in the form of a row and column matrix of display elements is created from a corresponding group of data cells stored functionally in a row-and-column matrix where the number of rows and columns in the stored matrix is less than the number in the displayed matrix, where n is an integer greater than one.