Showing papers on "Block (data storage) published in 1968"

Advanced keyword associative access memory system

Abstract: Circuitry is disclosed which uses a rotating magnetic disc file as an associative access memory. Each block of data stored on the file has associated with it a keyword, which keyword is used to access that particular block of data. The disc is partitioned into angular sectors and the blocks of data are stored in concentric, circular tracks as one block per sector per track, having their associated keywords recorded in radial tracks in the preceding sector. Data requests, including keyword information, are stored in a request hopper and are all simultaneously compared with each keyword as it is read from the disc. When a match occurs, the track defined by the matched keyword is read during the next sector in order to retrieve the requested block of data. Data requests may alternatively specify the track and sector address of a desired data block.

The Implementation of APL\360

Abstract: APL\360 is an experimental, conversational System/360 implementation of APL, the Iverson language. It provides fast response and efficient execution to a large number of typewriter terminals. With 40 to 50 terminals connected and in normal use, each with a block of storage (called a workspace) allocated, reaction time (defined as the time from completion of an input message until the user's program begins execution) is typically 0.2 to 0.5 second. At the terminal this is manifested by nearly instantaneous response to a trivial request. Under these conditions, the CPU is executing user programs about 75% of the time, while supervisor overhead and I/O waiting time amount to less than 5%. The APL processor is interpretive; however, because of the efficiencies afforded by array operations, program execution is often one-tenth to one-fifth as fast as compiled code. APL\360 is currently running on a System/360 Model 50 with 262,144 bytes of core storage, a 2314 Direct Access Storage Facility, and two 2702 Transmission Control Units to which IBM 1050 and 2741 Communication Terminals are connected via telephone lines.

Golden Block Search for the Maximum of Unimodal Functions

Abstract: In a previous paper [Avriel, M., D. J. Wilde. 1966. Optimal search for a maximum with sequences of simultaneous function evaluations. Management Sci.12 722.], the authors presented the minimax block search strategy for locating the maximum of unimodal functions of one variable by a sequence of simultaneous function evaluations. In the present work the nearly optimal minimax golden block search method is developed which has the advantage that the number of function evaluations need not be specified in advance. For one experiment per block it reduces to the well known golden section method. It is shown that this method is an excellent approximation of the block search strategy and that for a certain marginal resolution the two methods become identical.

Bayesian analysis of linear models with two random components with special reference to the balanced incomplete block design.

Abstract: : The paper considers linear models which contain two random components and enable representation of general designs with block effects random. It shows how, within a Bayesian framework, to combine the intra- and inter-block information about the location parameters. The balanced incomplete block design, an important special case, is considered in detail and illustrated by an example. A simple approximation to the marginal distribution of an individual contrast is also presented and illustrated.

A coincident-select MOS storage array

Abstract: Utilization of MOS monolithic storage arrays in random access memory offers low cost with high performance. An approach is described using a 64-bit coincident-select MOS storage device as the fundamental building block to achieve the low-cost high-performance goals. Device and circuit descriptions as well as cross-talk models are discussed.

Magnetic tape systems

Abstract: 1,133,879. Magnetic recording apparatus. SCIENTIFIC DATA SYSTEMS Inc. 31 Aug., 1966, No. 38904/66. Heading G5R. A control system for a magnetic tape-recorder adapted to record blocks of data from a data source comprises a magnetic tape 10 advanced past read-write heads 121, 122 by means of a capstan 11, the passage of fixed increments of tape past a stationary point producing control pulses which are passed to gates 28, 29 governing the passage of digital bits to write heads 121, the gap between the recording of two data blocks being metered by a counter 45. Magnetic tape 10 is slippage free coupled to a capstan 11 which is driven by a tachometer controlled motor 15 having a disc 25 supported on its shaft 16. Disc 25 is provided with tracks 25 1 , 251 1 having magnetically stored markers monitored by transducers 26, 27 which produce electrical sinusoidal signals during rotation of disc 25, the phase and frequency of each wave train being an exact indication of position and speed of the tape. The sinusoidal waves are respectively passed to gates 28, 29 which govern the passage of digital bits to write heads 121 through an " OR " gate 34, the output pulses of which serve as write clock pulses, and an " AND " circuit 35 which receives a write command signal from the set side output of a flip-flop 36. Gated pulses appearing at the output side of " AND " circuit 35 are passed to seven " AND " gates 37 as enabling signals, the writing of seven bits in parallel on tape 10 being clocked from pulses derived from disc 25. An end-of-record code is written after each record to actuate a detector 47 which turns off flip-flop 36 to block gate 35. When tape 10 has travelled a distance X, which is the distance between the read and write head gaps, a detector 41 connected to read head 122 is actuated to set a flip-flop 42 to open gate 43. This gate is connected to counter 45 which counts a predetermined number of bits before producting a write signal in line 46. Counter 45 thus meters the gap between records.

A cyclic check computer for error detection

Abstract: : The report discusses the design and use of equipment built to aid intercomputer communicatitions via serial-synchronous data transmission techniques. The interface described computes on a character-by-character basis, a cyclic redundancy block checksum which is appended to outgoing or checked against incoming messages. This hardware techniques reduces checksum computation on a small computer from several hundred microseconds per character to only several microseconds; a reduction that is necessary if more than several 201 type data modems are to be operated simultaneously under control of a single processor. Basic design objectives and decisions are described first. A brief overall system description with background information is then followed by programming considerations and detailed descriptions of the checksum computer logic. Finally diagnostic software and wirewrap documentation is provided for maintenance and/or reproduction purposes.