Showing papers on "Cascade amplifier published in 2019"

Two-Stage Compact Wideband Flat Gain Low-Noise Amplifier Using High-Frequency Feedforward Active Inductor

Abstract: In this article, a wideband differential low-noise amplifier (LNA) for multiband wireless communication applications is proposed. First, shunt peaking is implemented with a self-biased active inductor (AI) to realize wideband characteristics in a compact size. Second, a cross-coupled capacitor is added to the AI, thus constructing a feedforward path. It adds a signal to the output node so that the bandwidth (BW) can be further increased by compensating the gain reduction according to the frequency. Additionally, the feedforward path creates another feedback loop, generating a negative capacitance. The negative capacitance can cancel parasitic capacitance to increase BW with a cascade amplifier. The prototype LNA is fabricated with a 65-nm CMOS process. It has a gain of 26.7 dB and a BW of 4.1 GHz. The noise figure (NF) is 3 dB and the third-order input intercept point (IIP3) is −14.2 dBm at 2 GHz. It consumes 13.9 mA at a 1-V supply and has an area of 0.009 mm2.

Optimum Design of a New High Voltage Cascaded Amplifier Based on OPA454

Abstract: In order to obtain high linearity voltage signal with adjustable frequency, an optimal design scheme of high voltage cascaded linear amplifier based on OPA454 is proposed in this paper. Firstly, the main circuit, isolation circuit and cascade amplifier circuit of the high voltage cascade amplifier are designed. Then, the negative feedback characteristics and capacitive load characteristics of the linear amplifier are analyzed to ensure the high linearity and capacitive load capability of the output voltage signal. Finally, a two-stage cascade amplifier circuit model is built and tested in time domain at 0.001 Hz, 1.0 Hz and 1.0 kHz. The frequency response curves of the first-stage voltage amplifier circuit and the two-stage voltage amplifier circuit are compared in the frequency domain. The results show that the output voltage waveform of the new linear amplifier can be linearly amplified by 40n times of the input voltage, which achieves high linearity and low waveform distortion. It meets the requirement of accurate voltage amplification under adjustable frequency.

Predicting the Performances of Coherent Electron Cooling with Plasma Cascade Amplifier

Abstract: Recently, we proposed a new type of instability, Plasma Cascade Instability (PCI), to be used as the amplification mechanism of a Coherent Electron Cooling (CeC) system, which we call Plasma Cascade Amplifier (PCA). In this work, we present our analytical estimate of the cooling force as expected from a PCAbased CeC system. As an example, we apply our analysis to a planned PCA-based CeC test system and investigate the evolution of the circulating ion bunch in the presence of cooling. INTRODUCTION Cooling high energy, high intensity hadron beams remains one of the serious challenges in modern accelerator physics. Such cooling of natural emittances, while overcoming and mitigating other limitations, guarantees longer, more efficient stores that would result in significantly higher integrated luminosity in a hadron collider such as the Large Hadron Collider (LHC) at CERN, the Relativistic Heavy Ion Collider (RHIC) at the Brookhaven National Laboratory (BNL) or a future Electron-Ion Collider (EIC). One of the candidates to provide effective cooling for a high luminosity EIC is Coherent electron Cooling (CeC)[1]. CeC belongs to the family of stochastic coolers, but with the amplifier’s bandwidth extending into the optical region, e.g. beyond the THz range. Several possible broadband CeC amplifier, based on instabilities in the electron beam, have been suggested including high-gain free-electron lasers (FEL), microbunching instability (MBI) [2-4] and the plasma cascade instability (PCI) [5]. In this work, we have developed an analytical tool to estimate the performance of the plasma-cascade amplifier (PCA) based CeC system. Section II shows our derivation of the electrons’ line density modulation induced by a moving ion. In section III, we use the results in reference [5] to obtain the amplified line density perturbation with the initial condition derived in section II. From the amplified line density perturbation, we derived the longitudinal cooling field in section IV. We implement the one turn energy kick that ions receive from the cooling section into a tracking code and section V consists of our prediction for a test system of the PCA-based CeC. LINE DENSITY MODULATION AT MODULATOR Regardless of the amplification mechanism, a CeC system consists of a modulator, an amplifier and a kicker. To derive the longitudinal cooling force at the kicker section, we start with deriving electrons’ line density modulation at the exit of the modulator. For a uniform electron beam with 2   velocity distribution, the 3-D density modulation in the wave-vector domain is given by[6]             2 1 2 2 , 1 cos sin k t i p p p p p k Z n k t e t t k                                  , (1) where p  is the angular plasma frequency in the comoving frame, k  is the wave vector, i Z is the charge number of the ion, 0 v  is the velocity of the ion, x  , y  , and z  are the velocity spread of electrons, and         2 2 2 0 x x y y z z k ik v k k k             . (2) The line number density modulation in the longitudinal wave vector, z k , domain is given by   1 0,0, , z n k t  , i.e.           m 1 m m 2 1 cos sin 1 z z k i z z z z z Z e k e k k                 ,(3) where     0 / z z z z z z p k ik v k      , , 2 / m m p lab L     is the phase advance of plasma oscillation in the modulator, m L is the length of the modulator section and , p lab  is the plasma wavelength in the lab frame. The line number density in space-time domain is given by the inverse Fourier transformation of Eq. (3):

On approach to increase integration rate of elements of an four-cascade amplifier circuit

Abstract: In this paper we introduce an approach to increase integration rate of elements of an four-cascade amplifier circuit. Framework the approach we consider a heterostructure with special configuration. Several specific areas of the heterostructure should be doped by diffusion or ion implantation. Annealing of dopant and/or radiation defects should be optimized.

A Compact 1-5.2 GHz Wideband Low Noise Amplifier

Abstract: A wideband, low noise figure, cascade amplifier is presented in this paper. The proposed low noise amplifier is designed and fabricated in UMC 0.18 µm CMOS technology. In addition, this amplifier uses a resistor-feedback architecture. And this resistor-feedback amplifier contains the PMOS, NMOS and resistors form the amplifier architecture. The measurement results show that for the proposed low noise amplifier, the gain is above 10 dB at the bandwidth of 0.38-5.3 GHz, a maximum P1dB of −15 dB, a minimum NF of 4 dB and operating bands of return loss is greater than 12 dB.

A Novel Ultra-Wideband CMOS Low-Noise Amplifier for Wireless Communication

Abstract: The paper presents the investigation of a novel ultra-wideband CMOS low-noise amplifier for receiver system used for wireless communication. The design is based on a multistage cascade and cascode amplifier cell with a capacitive gain-peaking technique offering gain-enhanced noise cancellation that gives a band of 16.2 GHz, maximum forward gain of nearly 8 dB, NF of 3 dB and impedance matching of nearly 55 Ω is obtained. The proposed architecture is a wideband amplifier in conjunction with the previously proposed cell giving much wider band of 21 GHz. The NF of 1.6 dB is achieved with a maximum gain of approximately 19 dB, while the impedance matching is nearly 50 Ω. The LNA is implemented using design kit in ADS.v.2 2013 platform and 180-nm design technology.

A P-Band High Gain RF Amplifier based on SiGe HBT Technology

Abstract: A P-Band high gain radio frequency (RF) amplifier is presented in this paper. It is fabricated in a 0.35 μm silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology. Theory, simulation and measurement are shown. It is designed as a two-stage cascade amplifier. The input and output matching networks are designed on the chip. It achieves high power gain of 29.5 dB at 500 MHz, wide bandwidth of 1 GHz, low noise figure of 1.1 dB at 500 MHz, and high output 1 dB compression point of 11 dBm at 500 MHz. It is designed for narrow or wide bandwidth industrial and military applications that require high gain and low noise IF or RF amplification. It can also be easily integrated into a RF system-on-a-chip (SOC).

Wide Band Cascade RF amplifier for 0.01GHz to 6 GHz Application

Abstract: This paper presents a design of wide band cascade RF amplifier for 0.01 GHz to 6 GHz application using Hybrid Microwave Integrated (MIC) Technology. Wideband amplifier provides ultra-flat gain response of 1 dB for 4 GHz bandwidth and 3 dB for 6 GHz bandwidth. A coplanar wave guide (CPWG) is fabricated using printed circuit board technology and used for RF transmission line topology to convey microwave frequency signals. The output power at 1 dB compression is 17 dBm while the high gain is 22 dBm. The return loss shows below minimum -10 dB for all frequency and amplifier have good linearity and stability. The proposed amplifier can be used for L, S, and C band applications

Design of cascaded low noise amplifier for see through wall application

Abstract: This paper explains the design of two stage microwave low noise amplifier (LNA) for see through wall application. The cascade amplifier configuration and stub matching networks are applied in this design which is aimed to obtain high gain with minimum reflected RF power and Noise Figure. First stage and second stage of amplifier uses Low Noise Pseudomorphic HEMT ATF-34143 transistor as an active device and stub matching is deployed to achieve impedance matching. This work uses the Agilent Design System (ADS) software to optimize the performance of LNA circuit design. The designed LNA at frequency 2.4 GHz providing Gain=30.899 dB and Noise Figure (NF)=0.485dB

Distortion Analysis Using Volterra Kernel for Amplifier Circuits

Abstract: Distortion of amplifiers caused by the non-linear behavior of circuit components, is measured with the help of Volterra Kernel analysis. In this work, Volterra kernels are extracted by mathematical model as well as from spectral density of Circuit under-test (CUT) excited with random analog signal. Harmonic distortions and intermodulation distortion due to parametric deviation of device parameter (transistor width) and circuit components are evaluated for three amplifier circuits i.e. differential amplifier, cascade amplifier and low noise amplifier by mathematical model and spectral density method and compared with directly simulated result from CADENCE Virtuoso using UMC-180nm technology.

Differential power amplifier

Abstract: A differential power amplifier is disclosed. The differential power amplifier includes an output transformer having a primary winding with a first primary terminal, a center-tap terminal, and a second primary terminal. The differential power amplifier further includes a positive amplifier having a first signal output terminal coupled to the first primary terminal and a negative amplifier having a second signal output terminal coupled to the second primary terminal. A harmonic tuning network is made up of a common-mode inductor coupled between the center-tap terminal and a tuning node and a first electronically tunable capacitor coupled between the tuning node and a fixed voltage node. A controller is configured to tune the electronically tunable capacitor to resonate with the common-mode inductor at a second harmonic frequency of a signal being amplified by the positive amplifier and the negative amplifier.