Showing papers on "Circuit diagram published in 2003"

Programming flash memory via a boundary scan register

Abstract: A method and parallel interface for on-board programming and/or In-System Configuration of a flash memory mounted on a printed circuit board by controlling its inputs with the aid of an ASIC mounted on the same circuit board via a Boundary Scan register of which the output signals are provided for activating or deactivating a write operation. The architecture description of the ASIC, flash memory, and the data format of the program and configuration data are stored in a Boundary-Scan Description Language file. The circuit board can be controlled via a JTAG interface suitable for performing function testing of the flash memory for input or output of standard bus signals and for input of the control signals of the ASIC. To reduce the programming effort, the data of the circuit diagram or of the network list derived from it is stored in the BSDL file.

Methods, Apparatus and Computer Program Products for Generating Selective Netlists that Include Interconnection Influences at Pre-Layout and Post-Layout Design Stages

Abstract: Operations for generating an integrated circuit netlist include generating a first schematic of an integrated circuit having a plurality of cells therein and generating a second schematic that defines pre-layout electrical interconnects between the plurality of cells of the integrated circuit and approximates parasitic resistances and parasitic capacitances of the pre-layout interconnects. The first and second schematics are then combined at corresponding first and second ports within the first and second schematics, respectively. Operations also include generating an integrated circuit netlist by generating a circuit schematic that defines post-layout electrical interconnects between the plurality of cells of the integrated circuit and approximates parasitic resistances and parasitic capacitances of the post-layout interconnects. This circuit schematic is then combined with the first schematic at corresponding first and second ports therein. These embodiments may also be configured to generate a layout schematic from the first schematic of the integrated circuit and generate parasitic resistances and capacitances of the post-layout interconnects that extend between a plurality of cells in the layout schematic. Operations are then performed to generate parasitic resistances and capacitances of interconnects internal to at least one cell in the layout schematic.

Domino circuit topology

Abstract: A domino circuit topology that includes a dynamic circuit, logic circuit, and static circuit. The domino circuit includes a dynamic circuit, logic circuit, and static circuit coupled through a central node. The dynamic circuit includes a pre-charge circuit and a keeper circuit for pre-charging the central node and keeping the central node at its current voltage level. The static circuit provides a static output for the domino circuit. The logic circuit provides logical functions for input signals. In addition, the domino circuit can include an isolation transistor coupled between the central node and the logic circuit.

Translation of an electronic integrated circuit design into hardware description language using circuit description template

Abstract: Method, apparatus, and computer readable medium for translating an electronic design of an integrated circuit into circuit description language is described. The electronic design includes a plurality of circuit descriptions representing behavior of circuit elements. A circuit description template is associated with a circuit description of the plurality of circuit descriptions. The circuit description template includes a first portion for fixed attributes of the circuit description and a second portion for variable attributes of the circuit description. One or more text processors are associated with the circuit description template. Variable attributes of the circuit description are related to the second portion of the circuit description template to produce a data structure. The circuit description template is processed using the one or more text processors with the data structure as parametric input.

Self-testing circuit in semiconductor memory device

Abstract: A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.

Method, system and computer program product for automatically generating a subset of task-based components from engineering and maintenance data

Abstract: The method, system and computer program product for automatically generating a subset of components include receiving a request to generate a subset of components, accessing connectivity data that includes information regarding at least the components and connections among the components, and automatically selecting portions of the connectivity data that satisfy the request to generate the subset of components. The subset may then be used to generate a diagram of the subset of components from the portions of the connectivity data that satisfy the request. Thus, the method, system and computer program product are capable of efficiently creating subsets/families of components from electronic schematic diagrams because the portions of connectivity data that satisfy a request for a subset of components are automatically selected and a diagram of the selected components may be automatically generated.

Method for making layout data in semiconductor integrated circuit

Abstract: Circuit diagram data having repeated patterns is divided by the process of group dividing into main patterns and replicated patterns, relations of each of the patterns are held as group composition information, replicated pattern layout data corresponding to replicated patterns is made by copying the main pattern layout data corresponding to the main patterns made by a net driven layout editor, and the process of offset arrangement which involves shifting the coordinates of the replicated pattern layout data is performed, thereby making it possible to arrange the replicated pattern layout data on the same hierarchical level as the main pattern layout data and to make layout data with the flat circuit diagram data kept as it is.

Ultrasound screw bolt fastening force tester

Abstract: The utility model discloses an ultrasonic bolt mounting force tester, which comprises a longitudinal wave transducer and a transverse wave transducer which are respectively arranged on the end surface of a bolt, wherein, the longitudinal wave transducer is respectively connected with an ultrasonic emission circuit and an amplifier by a longitudinal wave receiving circuit; the transverse wave transducer is respectively connected with the ultrasonic emission circuit and the amplifier by a transverse wave receiving circuit; displacement sensors arranged on the two end surfaces of a tightly-clamped workpiece are connected with a DSP central processing unit by a thickness test circuit and a first A/D analog-to-digital conversion circuit; a temperature sensor arranged on the end surface of a nut is connected with the DSP central processing unit by a temperature test circuit and a second A/D analog-to-digital conversion circuit; a drive oscillator is respectively connected with an ultrasonic emission circuit diagram and the amplifier by a logic circuit; a time base pulse circuit is connected with the DSP central processing unit by a progressive mean circuit; a read only memory ROM used for storing material coefficient is hung on the DSP central processing unit. The utility model adopts an acoustic elasticity principle, and determines the mounting force of the bolt by measuring the transmission speed of the ultrasonic in the bolt. The utility model can be widely used for axial stress nondestructive examination of high-strength bolts on the steel structure.

Information display system and method for displaying information

Abstract: PROBLEM TO BE SOLVED: To easily grasp the correspondence relation of components between viewers of different sorts. SOLUTION: A circuit diagram based on the circuit diagram CAD data of a circuit board is displayed on the screen of a circuit diagram viewer 61 and a layout diagram based on the layout diagram CAD data of the circuit board is displayed on the screen of a layout diagram viewer 62. An area 71 or 72 corresponding to a component or wiring specified on the screen of either one of the circuit diagram viewer 61 and the layout graphic viewer 62 is turned on or flashed by a specific color on the screen, information for identifying the component or wiring specified on the screen is reported to the other viewer side, and at the time of receiving the report from the other viewer side, the area 71 or 72 corresponding to the component or wiring indicated by the reported information is turned on or flashed by the specific color on the screen. COPYRIGHT: (C)2005,JPO&NCIPI

Full-automatic controller of solar water heater

Abstract: The utility model discloses an automatic controller of a solar water heater. A circuit diagram is arranged in a shell of the controller and comprises a display circuit for controlling and setting water level and temperature, a circuit of using water and a circuit of supplementing water, which are interlocked, as well as an electric heating circuit. When the period of using water comes every day, if water temperature reaches or passes the set temperature, the heating circuit does not conduct; if water temperature does not reach the set temperature, the heating circuit conducts and increases to the set temperature and then automatically powers off. During the whole period of using water, the circuit of supplementing water is locked. When the period of using water ends, the circuit of using water is locked and the circuit of supplementing water conducts, supplements water automatically and then stops supplementing water automatically through a water level sensor when water is supplemented to the set water level. The controller, with low cost and energy consumption, is used for solar water heaters to realize the functions of the display of controlling and setting water level and temperature, the function of automatic water supply and cut-off in different periods as well as the function of electric heating compensation.

Translation of an electronic integrated circuit design into hardware

Abstract: Translation of an electronic design of an integrated circuit into circuit description language is described. In an example, a connection among circuit descriptions representing behavior of circuit elements in the electronic design is identified. The connection is associated with an identifier. The electronic design is then translated into a circuit description language representation, where the connection is implemented within the circuit description language representation using the identifier. In another example, an implicit circuit description representing behavior of circuit elements within the electronic design are identified. Explicit circuit descriptions within the electronic design are augmented with an addition circuit description. The electronic design is then translated into a circuit description language representation.

Method of verifying multi-power source electronic circuit

Abstract: PROBLEM TO BE SOLVED: To surely find out forgetting to include a level shifter in a circuit and errors of powers to be supplied to respective circuits, in a short period of time when designing a multi-power source electronic circuit. SOLUTION: A method of verifying the multi-power source electronic circuit having parts driven by a plurality of power sources is provided. When the electronic circuit is verified, a netlist representative of connection information of the electronic circuit being a verification object is read. Route search of wiring in the circuit is performed from all the power sources and input ports on the basis of the read netlist to determine and mark which power sources or input ports the individual circuit elements and nodes in the circuit are driven by. Individual circuit elements, circuit blocks, and nodes on a circuit diagram are displayed in colors different by driving power sources or input ports on the basis of a marking result. COPYRIGHT: (C)2005,JPO&NCIPI

System, method, and computer program product for schematic generation

Abstract: A method for electrical schematic creation includes loading a schematic definition file, and determining circuit component placement relationships according to the schematic definition file and a component rule set. The method also includes defining a location of a first component of the schematic definition file, and defining locations of a plurality of second components of the schematic definition file in relation to the location of the first component. The method also includes creating a schematic output file corresponding to the circuit component placement relationships and the schematic definition file, so that the schematic output file describes an automatically-generated electrical schematic corresponding to the schematic definition file.

Integrated circuit with parameter measurement

Abstract: Embodiments of the present invention provide an integrated circuit. In one embodiment, the integrated circuit comprises logic blocks and a measurement circuit. The measurement circuit is configured to measure internal operating parameters of the integrated circuit to obtain operating parameter data and provide the operating parameter data for evaluation and configuration of the integrated circuit and the logic blocks.

Voltage control for vehicle lights and interior lighting

Abstract: The invention proposes that the lighting systems (internal and external) of a motor vehicle are not supplied directly from the vehicle power bus but through a DC/DC converter The drawing shows a circuit diagram for the voltage control of the vehicle and interior lights

Logic circuit diagram input device

Abstract: PROBLEM TO BE SOLVED: To solve the problem that it is difficult to accurately predict a layout area from a logic circuit diagram. SOLUTION: This logic circuit diagram input device has: a hierarchy development means (1-2) developing logic circuit diagram information having a hierarchical structure to information to a transistor level so as to estimate the layout area from the logic circuit diagram configured with a transistor as a minimum unit; a shape parameter information extraction means (1-4) extracting information about a gate length, a gate width or the like of each the transistor; an area calculation means (1-7) calculating an area of each the transistor by an area calculation formula for calculating the area per transistor from the information; and a layout area estimation means (1-9) totaling the areas calculated to the respective transistors to obtain the layout area. COPYRIGHT: (C)2004,JPO&NCIPI

Circuit principle graph automatic checking method

Abstract: The method includes following procedures. The database of the inspecting rules is built. The database provides the interface for inputting the rules so that the inputting, modifying and extending these rules can be carried out. Based on the instruction input by the users, the documents of the circuit schematic drawing to be inspected and the inspecting rules are selected. Comparing with the inspecting rules inspects the circuit schematic drawings selected. After being inspected, the results are displayed. Since the said database is built and the users can modify the database, the invention increases the application greatly.

Signal excitation type electric microphone system

Abstract: A system of signal-excited electrodynamic loudspeaker is composed of an electrodynamic loudspeaker which consists of magnetic conductive hood, upper clampibng plate, DC excitation coil, and signal excitation coil, and a complemental circuit diagram. It can limit overheat of voice coil during large power operation through the complemental circuit diagram and can send audio current into the signal excitation coil through the signal excitation circuit to increase the magnetic induction intensity in air gap located by the voice coil for compensating the clipping distortion of the voice coil current when audio signal is too strong and input current of the voice coil is over loaded.

Device for creating coped circuit diagram, electronic circuit board design device, method and program for creating coped circuit diagram and recording medium where program is recorded

Abstract: PROBLEM TO BE SOLVED: To quickly design a circuit board including an appropriate measures component. SOLUTION: Various information acquiring parts 30 to 33 acquire circuit diagram data 20 of the electronic circuit board and store it in a storage part 12. A verification circuit creation part 35 creates a plurality of pieces of verification circuit data where respective measures components are added to circuit diagram data on a part being an object of analysis, which is read from the storage part 12, and stores it in the storage part 12. A measures circuit deciding part 35 analyzes verification circuit data which is read from the storage part 12 and the analyzing is repeated at every verification circuit data. Thus, the verification circuit data satisfying a prescribed condition is decided. A circuit correction part 37 corrects the part being the object of analysis in the circuit diagram data 20 which is read from the storage part 12 into verification circuit diagram information that the measure circuit deciding part 35 decides, and stores the corrected circuit diagram information in the storage part 12 as measures completed circuit diagram data 24. COPYRIGHT: (C)2005,JPO&NCIPI

Automatic circuit design apparatus and computer-implemented automatic circuit design method

Abstract: An automatic circuit design apparatus includes an analyzer ( 11 ) for analyzing a file in a form of a table, in which both connection conditions concerning a plurality of circuit components (e.g., intellectual properties) within an integrated circuit and connections among the plurality of circuit components corresponding to the connection conditions are described, and a description creating unit ( 12 ) for creating a description of the integrated circuit according to HDL based on analytical results from the analyzer ( 11 ).

Layout and wiring designing device

Abstract: PROBLEM TO BE SOLVED: To effectively utilize circuit diagram information and mounting symbol information, and simplify necessary preparation in designing layout and wiring for a printed circuit board. SOLUTION: A circuit diagram forming part 110 with which a circuit designer is skillful is provided with means 11 and 12 to simply set network attributes and part attributes which must be inputted at the least for control of layout and wiring design examination, and examination of layout and wiring design. A circuit information interface part 111 is provided with a means 13 to extract necessary information from circuit diagram data containing the attributes, etc., to be optimized. A layout and wiring design examination preparation part 112 is provided with a means 19 to simplify preparation work that must be executed every time of layout and wiring design, and a means 18 to automatically generate a device model which is short in a layout and wiring design examining part 113.

Circuit clustering during placement

Abstract: method of physical circuit design can include the steps of packing components of a circuit design that are dependent upon an architecture of the circuit design and assigning initial locations to each component of the circuit design. The components of the circuit design can be clustered by combining slices and including slices into configurable logic blocks according to design constraints, while leaving enough white space in the configurable logic blocks for post-placement circuit optimizations. The components of the circuit design then can be placed to minimize critical connections. The circuit design can be declustered to perform additional placer optimization tasks on the declustered circuit design.

Method for making layer increased circuit board with inner embedded film shape resistor assembly

Abstract: This invention discloses a process method for a layer-increased circuit plate with embedded film resistor passive assembly forming an organic insulation layer on a circuit base plate by deductino method and through holes at certain predetermined position, then forming a blocking layer diagram on certain predetermined zones of the said organic insulation layer to be processed with the coarsing step, the zone coarsing covered by blocking layer diagram can remain plane, removing the said blocking diagram, the plane zone is in less roughness after microcoarsing and depositing a resistor layer on micro-coarsing zone, forming a conductive layer by microimage to definite circuit diagram on it and forming resistor passive assembly electrode on the said resistor layer.

Device and method for designing analog cell layout

Abstract: PROBLEM TO BE SOLVED: To automatically predict the design constraint of analog cell layout from circuit diagram data without depending on the skill of a designer SOLUTION: The data of an analog circuit diagram prepared by a circuit diagram preparing part 1 are written in a circuit diagram storing part 2 Circuit connection information extracted from the analog circuit diagram data stored in the circuit diagram storing part 2 by a circuit connection information extracting part 3 is written in a circuit connection information storing part 4 Elements whose paring is necessary are predicted and extracted from the circuit connection information stored in the circuit connection information storing part 4 by a design constraint predicting and extracting part 4, and added to the circuit connection information as design constraint, and written in a circuit connection information storing part 6 The arrangement of layout cells is executed based on the circuit connection information including the design constraint stored in the circuit connection information storing part 6 by an automatic arranging part 9 The wiring of the layout cells arranged and stored in a layout storing part 10 is executed by an automatic wiring part 11

Universal electronic building block

Abstract: The utility model relates to a universal electronic building block, which is composed of various element pipes, conducting wire pipes, conducting wire T-pieces, conducting wire bent pipes, bushing and straight pipes. When assembling, a circuit can be assembled with adopting a stereo multilayered structure, and various circuits can be rapidly assembled according to a circuit schematic drawing, such as an electric fan, a music door bell and other circuits. The assembled object circuit not only can be completely consistent with the circuit schematic drawing with good visual performance, but also can attain the effect of same or similar configuration of the object circuit according to the object configuration in real life, and the utility model has strong interest. The utility model is suitable for electronic intelligence toys and teaching aids.

Bit arithmetic controller and programmable logic controller equipped with same

Abstract: PROBLEM TO BE SOLVED: To provide a bit arithmetic controller which can operates fast while maintaining modifications of a program, and a programmable logic controller (PLC) equipped with it. SOLUTION: The bit arithmetic controller 10 has a programmable logic device (PLD) 11, a means 17 which inputs an input signal to the PLD 11 during execution, and a means 18 which outputs an output signal to a controlled system 15. In the PLD, data on a circuit diagram generated by (a) compiling and converting a ladder program into an instruction list and converting the instruction list into equivalent digital circuit data in advance or (b) using constitution components of the ladder program as symbols for circuit components are expanded into digital circuit data by a digital circuit equivalent to ladder constitution components and the digital circuit data are converted into constitution data of the PLD 11 on the sop and written. Further, the PLC is equipped with this bit arithmetic controller 10.

Fuel-saving device for diesel engine

Abstract: The present invention relates to an fuel-saving device controlled by CPU for diesel engine, including bottom plate, fuel pipe, shell, cover plate, fixing screw, CPU, printed circuit board, Dailingtontube and coil, two walls of the external shell are equipped with opened hole, the fuel pipe is passed through the hole and is placed in the shell, said printed circuit board is placed in the externalshell, and the CPU and Darlington tube are placed on the printed circuit board and connected by means of circuit diagram, the coil is winded round exterior of oil pipe and connected with Darlington tube Said invention is simple in structure, good in magnetizing effect, high in reliability, small in volume and convenient for mounting

Placing substrate contacts into mixed-signal circuits controlling circuit performance

Abstract: We present a method for the automatic placement of substrate contacts by controlling their influence on circuit performance. This guarantees a layout that complies with the circuit's specification concerning substrate coupling. The algorithm minimizes the substrate contact area. Our method can be applied at transistor and block level. An example at block level is presented.

Method for securing correct pin assignment among each connecting part of system board by using common mapping file

Abstract: PROBLEM TO BE SOLVED: To provide a method for mapping a pin assignment to a printed circuit board. SOLUTION: The system of this invention secures the pin assignment among connecting parts of system boards of printed circuit boards 32, a plurality of software configuration files (SCFs) 12 and 14 defines the connecting parts of a plurality of printed circuit boards 32, a mapping file 16 correlates attributes of the pin assignment between the SCFs 12 and 14. A processing section 20 processes the SCFs 12, 14 and mapping file 16 and creates a board circuit diagram with respect to the circuit boards 32 having common pin assignment to respective connecting parts of the plurality of the circuit boards 32. The SCFs 12 and 14 may include symbol files 12 representing parts in the plurality of the circuit boards 32 and include geometry files 14 representing physical attributes of the parts. A design change is automatically associated with the pin assignment via the circuit boards 32 and a layout by inputting from an engineer at user stations 30 connected to a user interface 22.

Modularized circuit design information generating method, modularized circuit design information generating tool and integrated circuit prepared with circuit design information generated therefrom

Abstract: Modularized circuit design information generating tool comprises: a circuit module design database including circuit design information of functional modules of at least two categories, wherein at least one category of said functional modules includes design information of circuit modules of at least two different specifications; an element selection means to select suited circuit modules from said circuit module design database according to particular specifications of functional elements to be included into circuit to be designed and to include circuit design information corresponding to said selected circuit modules into circuit design information file of said circuit to be designed; a circuit module connection means to define connections between or among selected circuit modules according to features of each selected circuit module; a memory to store circuit design information of all selected circuit modules and information of connections between and/or among the selected circuit modules, both of circuit under design or circuit as designed; and a file converting means to convert circuit design information so obtained into an applicable format. The invention provides a modularized circuit design information generating method using the tool and the integrated circuit prepared using the circuit design information so generated.