Showing papers on "Comparator applications published in 1966"

Electrical signal phase comparator

Abstract: 1,102,783. Testing for phase differences. ENGLISH ELECTRIC CO. Ltd. March 22, 1966 [March 22, 1965], No. 12077/65. Heading G1U. [Also in Division H3] Two A.C. signals 20, 21 whose phase difference is to be detected are fed at 5, 6 to respective squarer units 7, 8 the outputs 22, 23 of which are fed over buffer stages 9, 10 into an AND gate 11 which produces an output signal 24 only when both inputs are negative. The square waves 22, 23 are also fed into a NOR gate 12 which produces an output signal 25 only when neither of the inputs is negative. The waveforms 24, 25 are fed into a NOR gate 13 which produces an output signal 26 only when neither input is negative. The length of each pulse of waveform 26 is thus equal to the instantaneous phase difference between waveforms 20, 21. A timing circuit 14 connected to gate 13 is activated for the period of the pulse 26 and produces an output which is fed to a bi-stable trigger circuit 15 causing the latter to be switched to a SET state if the period exceeds a predetermined minimum. In the SET state, trigger circuit 15 produces an output at terminal 16 indicating that the phase difference between the A.C. signals 20, 21 has reached a predetermined value. Trigger circuit 15 is reset to its original state by an externally controlled signal on line 17 and remains in this state for the periods when both signals 20, 21 are positive and when both signals are negative. Operation of timing circuit 14 is prevented, until required, by a signal on a line 18. The comparator may be used with circuits 14, 15 and line 18 omitted, the terminal 16 being connected directly to the output of NOR gate 13.

A versatile and sensitive balanced magnetic comparator

Abstract: A magnetic circuit is described wherein a pair of matched square-loop magnetic cores are connected in a balanced manner to act as a sensitive null-detector called a balanced magnetic comparator. A material characteristic and a mode of operation that significantly increase the sensitivity over that of the basic circuit are also described. The sensitivity of the balanced magnetic comparator is such that low-level transducers/sensors can be directly connected to the input winding and produce an unbalanced condition. Thus, by means of successive approximation, the measurand signal from a sensor can be converted to digital form without interposing semiconductor amplifiers. Comparator circuits have been operated over a temperature range of 100°C with a resolution of 10 μA, and a 7-bit accuracy. In this use as an A-D converter the balanced magnetic comparator is unbalanced by the current output from a transducer, and balance is restored by precision weight currents. These weight currents can be generated in pulse form by transistorized circuits that use additional comparators operating in a dynamic mode. In this dynamic mode the time function of the output waveform is used, rather than polarity, as in the A-D converter. These comparators provide feedback control to the transistors in order to achieve the necessary precision in the weight-current pulses. Using a balanced comparator rather than a single square-loop core has a major advantage in that the offset contributed by the threshold of a single core is eliminated.