Showing papers on "Converters published in 1973"

Low-Frequency Characterization of Switched dc-dc Converters

Abstract: Averaging techniques are developed to represent buck, boost, and buck-boost types of switched dc-dc converters by approximate continuous models. Simple analytical expressions in terms of the circuit components are derived for the characteristic transient and frequency responses of time-average(continuous) power-stage models for use in designing and understanding the behavior of corresponding switched power stages. Novel conclusions include the dependence of effective circuit component values upon switch duty ratio and the existence of a real positive zero in certain transfer functions. Responses from analog computer simulations of the switched and averaged powerstages agree well and, in turn, confirm the analytic predictions. High-order systems can be analyzed by the averaging technique without a commensurate increase in complexity.

Computer-Aided Design and Graphics Applied to the Study of Inductor-Energy -Storage Dc-to-Dc Electronic Power Converters

Abstract: A series of nine programs are developed for the design of the inductors of single-winding flyback converters. Three converter types are considered: voltage step-up, current step-up, and voltage step-up/current step-up. For each of the converter types, three pulse modulators are considered: constant frequency, constant transistor on-time, and constant transistor off-time. Computer-graphics displays are used to assist in evaluating characteristics of the various converter-modulator combinations.

Active filter for the input harmonic current of static power converters

Abstract: An active filter for the input harmonic currents of static power converters comprising an active harmonic voltage generator connected in series with a passive reactive element, the series combination being connected across the converter input terminals. The passive reactive element is such that essentially the fullline voltage appears across the passive reactive element whereby the volt-ampere rating of the active harmonic voltage generator can be materially reduced.

Linear electromagnetic systems

Abstract: If all voltages operative upon any system are caused to vary proportionately, the output signal derived therefrom must also vary in the same proportion. This principle is applied to such devices as amplifiers and frequency converters as a means of significantly extending their linear dynamic operating ranges.

Optimum control system for minimizing harmonic effects in HVDC power converters

Abstract: A real-time system for reducing the effects of harmonics reflected onto the a. c. supply line of a High Voltage Direct Current power converter by continuous measurement of various current and voltage fundamental, harmonic and d. c. components as reflected onto the supply line, calculation of an overall harmonic performance index based upon the necessary ones of the measured components, and on-line control of the firing angles at which various switching functions occur in the HVDC power converter to optimize the value of the performance index.

The application of standardized control and interface circuits to three DC to DC power converters

Abstract: Standardized.control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the seriesswitching buck regulator, and the pulse-modulated paral1el inverter. The two-loop ASDTIC regulation control concept was implemented by using a common Analog Control Signal Processor (ACSP) and a novel Digital Control Signal Processor (DCSP). This resulted in control circuit standardization and superior static and dynamic performance of the three dc to dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

ASDTIC control and standardized interface circuits applied to buck, parallel and buck-boost dc to dc power converters

Abstract: Versatile standardized pulse modulation nondissipatively regulated control signal processing circuits were applied to three most commonly used dc to dc power converter configurations: (1) the series switching buck-regulator, (2) the pulse modulated parallel inverter, and (3) the buck-boost converter. The unique control concept and the commonality of control functions for all switching regulators have resulted in improved static and dynamic performance and control circuit standardization. New power-circuit technology was also applied to enhance reliability and to achieve optimum weight and efficiency.

A Symmetry Correcting Pulsewidth Modulator for Power Conditioning Applications

Abstract: A wide variety of power converters is of the transformer-coupled push-pull type and uses pulsewidth modulation for output regulation. In designing and operating such converters, serious complications usually arise as a result of unsymmetrical switching of the two power transistors. Caused by small parameter dissymmetries of these transistors, asymmetrical switching normally drives the transformer into saturation. Resulting excessive saturation currents reduce efficiency and put a severe strain on the power transistors, which can eventually cause circuit failure. This paper presents a new pulsewidth modulator circuit which can be advantageously utilized in the design of such converters, and which can effectively cope with the aforementioned symmetry problem. Symmetry correction is accomplished by monitoring the two primary currents and by providing proper feedback of the integrated difference between these two currents.

Design of two-winding voltage step-up/current step-up constant-frequency DC-to-DC converters

Abstract: This paper presents procedures for designing the transformer for a two-winding energy-storage dc-to-dc power converter in which the power transistor is pulsewidth modulated by means of a constant-frequency type of controller. The presence of the second winding provides an additional degree of freedom in the design procedures beyond those for single-winding converters and leads to a number of design options for achieving specific performance characteristics. Ten options are provided: four relate to conditions that may be imposed on the duty cycle, four to maximum stress on the semiconductors, and two to the transformer turns. The design algorithm has been implemented in a computer program to automate the design procedures and to provide an evaluation of the converter circuit for each of the transformer designs.

High speed parallel-cascaded analog to digital connector

Abstract: An ultra high speed, parallel-cascaded analog to digital converter employs non-saturating current switches, a constant current source, and a summer for effecting the parallel-cascaded interconnection of two or more parallel A/D converters.

Converter station with parallel static converters

Abstract: 1427405 Parallel operation of converters ALLMANNA SVENSKA ELEKTRISKA AB 9 July 1973 [10 July 1972] 32508/73 Heading H2F A converter station, e.g. for HVDC power transmission, comprises two parallel converters, each provided with a current regulator which is adjusted to give a predetermined load distribution between the two converters, each including upper and lower limit circuits for the control angle and each provided with means responsive to the current distribution between the converters arranged to reduce the lower limit of control angle in the least loaded converter when the deviation from the normal current distribution exceeds a certain threshold, e.g. due to a commutation fault in one converter. Fig. 3 shows part of a control system for the two converters, the direct current of which is respectively monitored by transductors 16 and 23 and compared with reference voltages from potentiomerers 26, 27. The system is arranged so that the AND gate 30 or 31 associated with the more lightly loaded converter passes a signal to trigger a monostable flip-flop 32 which temporarily reduces the minimum control angle limit from 18. A further monostable 34 is arranged to increase the current order in the current regulator 13 in order to avoid oscillations in the direct current. The upper limits of control angle may be temporarily limited by way of an OR gate 38 and derivative circuit 39. A further circuit 42 which compares the current or powers on the A.C. and D.C. sides and a circuit 43 as described in Specification 1,228,867 for detecting partial or possible commutation faults may be included to inhibit gate 30 in the event of possible or complete commutation failure in one converter. This inhibition only has effect on the overall system when commutation failure occurs in both converters.

A symmetry correcting pulse-width modulator for power conditioning applications

Abstract: A wide variety of power converters of the transformer-coupled push-pull type uses pulse-width modulation for output regulation. In designing and operating such converters, serious complications usually arise as a result of unsymmetrical switching of the two power transistors. Asymmetrical switching, caused by small parameter dissymmetries of these transistors, normally drives the transformer into saturation. Resulting excessive saturation currents reduce efficiency and put a severe strain on the power transistors, which can eventually cause circuit failure. This paper presents a new pulse-width modulator circuit which can be advantageously utilized in the design of such converters, and which can effectively cope with the above mentioned symmetry problem. Syrnmetry correction is accomplished by monitoring the two primary currents and by providing proper feedback of the integrated difference between these two currents.

Analogue-digital converter apparatus

Abstract: The apparatus comprises a plurality of analogue-digital converters of the same number as the number of bits (m) of the digital output, a plurality of delay elements coupled to respective converters to successively apply the analogue input to the analogue-digital converters starting from the converter corresponding to the most significant digit with a predetermined time delay between the inputs to adjacent converters, a plurality of shift registers which store the outputs from respective analogue-digital converters and successively shift the stored outputs, weight resistors controlled in accordance with the contents of the shift registers for supplying reference voltages of different values successively to the analogue-digital converters starting from the converter corresponding to the most significant digit, and memory means for storing the outputs from the analogue-digital converters and for producing a digital output corresponding to the analogue input.

Some negative impedance converters

Abstract: Four new transistor-resistor negative impedance converter circuits are presented, two of the voltage-inversion type and two of the current-inversion type. Their gain-product sensitivities are tabulated.

Some photoelectrical characteristics of photoelectric converters with a p-i- n structure

Abstract: Measurements of the current-voltage characteristics and photo emf in photoelectric converters made of B and P-doped highresistance silicon and containing p-i-n structures are presented. The high photo emf and current- voltage characteristics with nearly rectangular effective sections suggest the possibility of the creation of highly efficient energy converters of this design. (IAA)

Molecular solid-state inverter-converter system

Abstract: A modular approach for aerospace electrical systems has been developed, using lightweight high efficiency pulse width modulation techniques. With the modular approach, a required system is obtained by paralleling modules. The modular system includes the inverters and converters, a paralleling system, and an automatic control and fault-sensing protection system with a visual annunciator. The output is 150 V dc, or a low distortion three phase sine wave at 120 V, 400 Hz. Input power is unregulated 56 V dc. Each module is rated 2.5 kW or 3.6 kVA at 0.7 power factor.

Three-Frequency Non-Inverting Converters

Abstract: The frequency f(−) is not used and the equivalent circuit of Fig. 3.3 reduces to that in Fig. 4.1.