Showing papers on "FET amplifier published in 2022"
TL;DR: In this article , a low voltage high performance design of operational transconductance amplifier is proposed, based on bulk driven quasi-floating gate metal oxide semiconductor field effect transistor (MOSFET) which supports low voltage operation and improves the gain of the amplifier.
Abstract: A low voltage high performance design of operational transconductance amplifier is proposed in this paper. The proposed architecture is based on bulk driven quasi-floating gate metal oxide semiconductor field effect transistor (MOSFET) which supports low voltage operation and improves the gain of the amplifier. Besides to this the tail current source requirement of operational transconductance amplifier (OTA) is removed by using the flipped voltage follower structure at the input pair along with bulk driven quasi-floating gate MOSFET. The proposed operational transconductance amplifier shows a five-fold increase in direct current (DC) gain and 3-fold increase in unity gain bandwidth when compared with its conventional bulk driven architecture. The metal oxide semiconductor (MOS) model used for amplifier design is of 0.18 um complementary metal oxide semiconductor (CMOS) technology at supply of 0.5 V.
1 citations
29 Apr 2022
TL;DR: In this paper , a 3.5 GHz power amplifier has been designed using CGH40010F, which provided a power added efficiency of 57.5128 %, with a gain of 11.283dB and output power of 39.283 dBm.
Abstract: Power amplifier is necessary component in wireless communications. Power amplifier (PA) being an important element of the transmitter, greatly affects both efficiency and linearity. Different active devices can be used in power amplifier architecture. In this paper a 3.5 GHz power amplifier has been designed using Cree CGH40010F. The amplifier provided a Power Added Efficiency of 57.5128 %, with a gain of 11.283dB and output power of 39.283dBm.
TL;DR: In this article , a W-band power amplifier using a 28-nm CMOS process for radar applications is presented, which consists of a two-stage driver amplifier and last-stage power amplifier.
Abstract: In this paper, we present a W-band power amplifier using a 28-nm CMOS process for radar applications. The designed amplifier consists of a two-stage driver amplifier and last-stage power amplifier. The driver amplifier uses a differential common-source topology, and the power amplifier adopts a differential cascode topology. Both the driver amplifier and power amplifier utilize the neutralization technique at the common-source stage for stability and sufficient power gain. Each interstage of the amplifier used a transformer for impedance matching. The W-band signal applied to the first driving amplifier is supplied 14 GHz to 16 GHz external signal source multiplied by 6 using the internal multiplier, the power amplifier achieved 14.9 dBm output power, and the 3-stage amplifier consumed 262 mW of DC power. The 1 dB-bandwidth is 10 GHz from 85 GHz to 95 GHz. The core size of the 3-stage amplifier is 110 μm × 300 μm.
04 Apr 2022
TL;DR: In this paper , a novel gain switch circuit using a resonant bidirectional field effect transistor (FET) amplifier is presented, which can provide insertion gain even at the millimeter-wave frequencies.
Abstract: This paper presents a novel gain switch circuit using a resonant bidirectional field-effect transistor (FET) amplifier. The proposed switch circuit can provide insertion gain even at the millimeter-wave frequencies by using a resonant bidirectional FET amplifier. The fundamental operation of a single pole single throw (SPST) FET gain switch is successfully demonstrated as a GaN/SiC microwave monolithic integrated circuit (MMIC), which is a quite essential material to ensure the watt-class RF power handling capability for the transmission signal even at the millimeter-wave frequencies. It shows the insertion gain and isolation of 0.98 dB and 11.2 dB, respectively, at 25 GHz. Input power for 1-dB gain compression, P 1dB , is around 6 dBm at 25 GHz. For further improvement of insertion gain and isolation, maximizing transconductance of FET and minimizing feedback capacitance by bias optimization and/or increasing stage number of a bidirectional amplifier are found to be efficient from principle analysis of the presented switch circuit. Furthermore, optimization of gate width and bias voltage improves power handling capability.
TL;DR: In this paper , a high temperature, high gain differential amplifier based on a custom-built silicon carbide (SiC) N-channel junction field effect transistor (JFET) only, without using complementary P-channel devices is proposed.
TL;DR: In this paper , an inverter based chopper stabilized capacitively coupled amplifier is designed for biomedical applications using 14 nm FinFET technology, which provides a significant reduction of noise as shown by Noise Efficiency Factor (NEF) of 3.66.
Abstract: Design of low power and low noise amplifier for biomedical signal acquisition is quite challenging. In this paper, an inverter based chopper stabilized capacitively coupled amplifier is designed for biomedical applications using 14 nm FinFET technology. Single-stage inverter based amplifier which is used as a core amplifier in the proposed chopper stabilized circuit is designed and compared using different configurations of FinFET and CMOS. Gain and power dissipation is better with fully FinFET based single-stage amplifier when compared with fully CMOS based counterpart. When the FinFET based amplifier is used with capacitive feedback and chopper stabilization circuit, it provides a significant reduction of noise as shown by Noise Efficiency Factor (NEF) of 3.66. The gain in chopper stabilized amplifier is 36.7 dB and bandwidth is in the range of 9.16 Hz–7.6 kHz. The CMRR and PSRR of the designed amplifier are 96.1 dB and 98.5 dB respectively. The power dissipation of the amplifier is 1.24 μ W which is relatively better. In the end, spike reduction circuitry is also used successfully to minimize the spikes in the output signal.