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Showing papers on "Hardware register published in 1977"


Patent
01 Apr 1977
TL;DR: In this paper, the use of a four-bit control field in a microinstruction word which is set into a hardware register to extend the address beyond the normal range of the addressing capability of the word is discussed.
Abstract: An apparatus for increasing the capacity and speed of access of a large microprogram read only memory. The apparatus incorporates the use of a four bit control field in a microinstruction word which is set into a hardware register to extend the address beyond the normal range of the addressing capability of the microinstruction word. The four bits stored in the hardward register allow one of a maximum of sixteen read only memory banks to be selected. The word in the selected bank is selected by the normal range. This technique also allows the selection of another of the read only memory banks in one machine cycle.

33 citations


Proceedings ArticleDOI
24 Feb 1977
TL;DR: A method for detecting errors in hardware designs based on algebraic manipulation using a non-procedural register transfer language and the problem of detecting races and hazards in this framework is addressed.
Abstract: This paper describes a method for detecting errors in hardware designs based on algebraic manipulation. The behavior of a hardware system is specified using a non-procedural register transfer language. Similar specifications are provided for each component in the circuit. Using the techniques discussed here it should be possible to determine if the device will function correctly. The problem of detecting races and hazards in this framework is also addressed.

10 citations


Proceedings ArticleDOI
01 May 1977
TL;DR: The hardware implementation of a two-dimensional (2-D) digital filter using Read Only Memory (ROM) is outlined and the provision for the selection of row or columnwise recursion, and the various sequence of operations involved in the actual processing are discussed.
Abstract: The hardware implementation of a two-dimensional (2-D) digital filter using Read Only Memory (ROM) is outlined. Specifically, an implementation scheme for a general all pole 2×2 2-D filter is considered here. The provision for the selection of row or columnwise recursion, and the various sequence of operations involved in the actual processing are discussed.