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Showing papers on "Paging published in 1969"


Journal ArticleDOI
TL;DR: It is shown that carefully designed matrix algorithms can lead to enormous savings in the number of page faults occurring when only a small part of the total matrix can be in main memory at one time.
Abstract: Matrix representations and operations are examined for the purpose of minimizing the page faulting occurring in a paged memory system. It is shown that carefully designed matrix algorithms can lead to enormous savings in the number of page faults occurring when only a small part of the total matrix can be in main memory at one time. Examination of addition, multiplication, and inversion algorithms shows that a partitioned matrix representation (i.e. one submatrix or partition per page) in most cases induced fewer page faults than a row-by-row representation. The number of page-pulls required by these matrix manipulation algorithms is also studied as a function of the number of pages of main memory available to the algorithm.

177 citations


Journal ArticleDOI
TL;DR: The running time of programs in a paging machine generally increases as the store in which programs are constrained to run decreases, but experiments have revealed cases in which the reverse is true: a decrease in the size of the store is accompanied by a decreases in running time.
Abstract: The running time of programs in a paging machine generally increases as the store in which programs are constrained to run decreases. Experiment, however, have revealed cases in which the reverse is true: a decrease in the size of the store is accompanied by a decrease in running time.An informal discussion of the anomalous behavior is given, and for the case of the FIFO replacement algorithm a formal treatment is presented.

114 citations


Journal ArticleDOI
Brian Randell1
TL;DR: The most striking result is the apparently general rule that rounding up requests for storage, to reduce the number of different sizes of blocks coexisting in storage, causes more loss of storage by increased internal fragmentation than is saved by decreased external fragmentation.
Abstract: The main purpose of this paper is the presentation of some of the results of a series of simulation experiments investigating the phenomenon of storage fragmentation. Two different types of storage fragmentation are distinguished: (1) external fragmentation, namely the loss in storage utilization caused by the inability to make use of all available storage after it has been fragmented into a large number of separate blocks; and (2) internal fragmentation, the loss of utilization caused by rounding up a request for storage, rather than allocating only the exact number of words required. The most striking result is the apparently general rule that rounding up requests for storage, to reduce the number of different sizes of blocks coexisting in storage, causes more loss of storage by increased internal fragmentation than is saved by decreased external fragmentation. Described also are a method of segment allocation and an accompanying technique for segment addressing which take advantage of the above result. Evidence is presented of possible advantages of the method over conventional paging techniques.

93 citations


Proceedings ArticleDOI
20 Oct 1969
TL;DR: In this article, the design and implementation considerations of segmentation and sharing in Multics are first discussed under the assumption that all information resides in a large, segmented main memory.
Abstract: As experience with use of on-line operating systems has grown, the need to share information among system users has become increasingly apparent. Many contemporary systems permit some degree of sharing. Usually, sharing is accomplished by allowing several users to share data via input and output of information stored in files kept in secondary storage. Through the use of segmentation, however, Multics provides direct hardware addressing by user and system programs of all information, independent of its physical storage location. Information is stored in segments each of which is potentially sharable and carries its own independent attributes of size and access privilege.Here, the design and implementation considerations of segmentation and sharing in Multics are first discussed under the assumption that all information resides in a large, segmented main memory. Since the size of main memory on contemporary systems is rather limited, it is then shown how the Multics software achieves the effect of a large segmented main memory through the use of the GE 645 segmentation and paging hardware.

54 citations


Proceedings ArticleDOI
14 May 1969
TL;DR: The Spectra 70/46 Time Sharing Operating System is designed to be a combined time-sharing and multiprogramming system that will support up to 48 conversational users or a combined total of 64 batch and interactive tasks processing simultaneously.
Abstract: The Spectra 70/46 Time Sharing Operating System (TSOS) is designed to be a combined time-sharing and multiprogramming system that will support up to 48 conversational users or a combined total of 64 batch and interactive tasks processing simultaneously.

19 citations


Proceedings ArticleDOI
26 Aug 1969
TL;DR: The segmentation and paging mechanism is described; then some important parts of the supervisor which are characteristic of two-dimensional addressing are discussed, especially scheduling and swapping, dynamic linking, and how to process common segments.
Abstract: HITAC5020 time sharing system with a two-dimensional addressing feature was developed to accomplish the following: 1) to establish a design for a time sharing system with a two-dimensional addressing scheme, 2) to establish the structure of the required file system, 3) to explain the intrinsic nature of the man-machine interaction, 4) to expedite studies for productivity improvement of software. This type of time sharing system has great merit in comparison with conventional time sharing systems and will likely be the basis for many future large scale information processing systems. In this paper, we first describe the segmentation and paging mechanism; then we discuss some important parts of the supervisor which are characteristic of two-dimensional addressing, especially scheduling and swapping, dynamic linking, and how to process common segments.

13 citations


Patent
29 Sep 1969
TL;DR: In this paper, an automatic electronic paging system is described, where each subscriber is identified by a unique identification code which is selectively converted to a supplemental identification code upon a subscriber entering a paging area.
Abstract: Disclosed herein is an automatic electronic paging system. Each subscriber is identified by a unique identification code which is selectively converted to a supplemental identification code upon a subscriber entering a paging area. The supplemental identification codes are unique within each paging area but not unique within the overall paging system. A plurality of sensor units are located within each paging area, each of the sensor units having temporarily and selectively stored therein a supplemental code corresponding to one of the unique identification codes identifying a subscriber within the paging area. The paging signal, in the form of a unique identification code is sent to the paging area where it is converted to a corresponding assigned supplemental identification code. The supplemental code is transmitted to all sensors in the area with a paging signal being generated at the one sensor containing the transmitted supplemental code. In response to the receipt of a paging signal, a subscriber can send an acknowledgment code to the pager.

12 citations


Journal ArticleDOI
TL;DR: This paper compares empirical results that have been obtained for several virtual memory swapping algorithms with the results that were obtained as software components of a multiple computer on-line system.
Abstract: This paper compares empirical results that have been obtained for several virtual memory swapping algorithms. The algorithms were tested as software components of a multiple computer on-line system.

11 citations


Proceedings ArticleDOI
20 Oct 1969
TL;DR: Distributions of segment sizes have been measured under routine operating conditions on a computer system which utilizes variable-sized segments (the Burroughs B5500).
Abstract: Distributions of segment sizes have been measured under routine operating conditions on a computer system which utilizes variable-sized segments (the Burroughs B5500). The most striking feature of the measurements is the large number of small segments - about 60% of the segments in use contain less than 40 words. Although the results are certainly not installation-independent, they should be relevant to the design of new computer systems, especially with respect to the organization of paging schemes.

9 citations


Proceedings ArticleDOI
20 Oct 1969
TL;DR: The strategies for effective structuring of data and program code in a two level, directly addressable paged memory system are presented along with the experience gained from deriving and implementing appropriate algorithms in one time-shared system.
Abstract: The strategies for effective structuring of data and program code in a two level, directly addressable paged memory system are presented along with the experience gained from deriving and implementing appropriate algorithms in one time-shared system. The experience indicated that a reduction in the paging rate can result through the addition of a slower second-level bulk memory thus leading to improved performance. While improved techniques for structuring these memories coupled with faster and / or cheaper bulk memories offer further improvements in performance, reduction in the paging overhead might offset some of these performance advantages.

8 citations


Journal ArticleDOI
TL;DR: Event indicators and mathematical tools are presented which supply characterizations of the paging and segmentation addressing processes which can be used to derive Bayesian storage allocation algorithms conditionally based upon usage, demand, and processing history.
Abstract: This short note focuses attention upon techniques for dynamic memory allocation in multiprogrammed systems which employ the addressing mechanisms of paging and segmentation. Here, event indicators and mathematical tools are presented which supply characterizations of the paging and segmentation addressing processes. It is shown that these statistical characterizations form data bases which can be used to derive Bayesian storage allocation algorithms conditionally based upon usage, demand, and processing history. It is argued that these characterizations, and algorithms similar to those constructed here, provide a flexible basis for efficient memory management in multiprogrammed, and by extension, time-shared environments. Although emphasis is directed to managing primary (main) memory residence, the techniques could be extended to govern memory management for a hierarchy of storage devices.


Proceedings ArticleDOI
26 Aug 1969
TL;DR: In this article, an analytic and a simulation model expose serious deficiencies of a well known definition of a bad replacement in virtual memory computer systems, which can actually lead to degraded performance.
Abstract: Systems analysts are designing algorithms to reduce the large overhead costs of present paging schemes in virtual memory computer systems. In this paper an analytic and a simulation model expose serious deficiencies of a well known definition of a “bad replacement” in such systems. The use of this complex definition to evaluate replacement rules can actually lead to degraded performance. A simpler definition is proposed. The analysis indicates that for the class of problems studied, simulation techniques appear to have advantages over probabilistic models.