Showing papers on "Process corners published in 1977"

Wafer edge detection system

Abstract: A noncontact gauge for edge detecting of semiconductor wafers in a test rig which indexes between circuits in the semiconductor wafer to provide functional tests upon them. The noncontact gauge includes a capacitive probe having an elongated finger that is bent into position a few thousands of an inch above the wafer when positioned for circuit tests in order to detect whether the circuit test system, in indexing from circuit to circuit in the row and column matrix of integrated circuit chips in the wafer, has moved to one edge or the other of the water. The edge detection system operates with conventional wafer test systems which raise and lower the wafer between tests to index from one integrated circuit to the next in the wafer matrix. When the wafer is in the down position, the circuitry, which includes an automatic compensation system, changes modes to calibrate the edge detector circuit for a predetermined capacitance representative of capacitance sensed by the finger of the probe when the wafer is moved out of proximity. Additionally, the circuitry and in particular the energization for the capacitive probe, is de-energized for a portion of the period when the wafer is in position and a particular integrated circuit being tested in order to eliminate interference between the probe excitation and the check-out circuitry.

Correlation of fabrication process and electrical device parameter variations

Abstract: A program for modelling IC fabrication processes is described. Simulated and measured impurity profiles are shown for a bipolar transistor technology. These profiles are used to study the sensitivity of electrical device parameters to process variations. A comparison of simulated device performance using process models gives parameters which bracket measured results for 35 die across a wafer. A statistical model is given which relates twelve parameters to the base transport current.

Large-scale integrated circuit with integral bi-directional test circuit

Abstract: A large scale integrated circuit with external integral access test circuitry having a semiconductor body with a surface. A large scale integrated circuit is formed in the semiconductor body through the surface and comprises a large number of interconnected circuit elements with a large number of input and output pads connected to the circuit elements and disposed near the outer perimeter of the semiconductor body. An integrated test circuit is formed in the semiconductor body and extends through the surface. The integrated test circuit has a plurality of probe pads carried by the semiconductor body and connected to the test circuit. The integrated test circuit is formed external of but in relatively close proximity to the large scale integrated circuit. Leads are provided on the semiconductor body which connect the integrated test circuit to the large scale integrated circuit whereby access can be obtained to the large scale integrated circuit through probing of the probe pads of the integrated test circuit to ascertain the characteristics of the large scale integrated circuit.