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Showing papers on "Synchronous frame published in 2008"


Journal ArticleDOI
TL;DR: In this article, an injection-based axis switching (IAS) sensorless control scheme using a pulsating high-frequency (HF) signal to minimize position detection error and velocity estimation ripple resulting from the zero-current-clamping (ZCC) effect for surface-mounted permanent magnet motors was proposed.
Abstract: In this paper, we propose an injection-based axis switching (IAS) sensorless control scheme using a pulsating high-frequency (HF) signal to minimize position detection error and velocity estimation ripple resulting from the zero-current-clamping (ZCC) effect for surface-mounted permanent-magnet motors. When a pulsating carrier-signal voltage is injected in an estimated synchronous frame, the envelope of the resulting HF current measured in the stationary reference frame follows an amplitude-modulated pattern. Using this information, the IAS technique allows one to avoid multiple zero crossings of HF currents by adjusting the current phase angle according to the load condition. At no-load condition, the pulsating voltage is injected only on the d-axis, while the d-axis current is controlled to a certain nonzero value. Under a load condition, the injection voltage is switched to the q-axis, while the d -axis current drops back to zero. Thus, the proposed sensorless control enforces a much better estimation performance in a region of ZCC without a predefined offline commissioning test than the standard pulsating injection scheme. Experiments illustrate the effectiveness of the proposed method in suppressing the estimation error caused by the ZCC disturbance and in extending the system bandwidth.

46 citations


Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this article, a phase-locked loop (PLL) is proposed to estimate the angular frequency and the positive and negative sequences of the fundamental component of a three-phase signal.
Abstract: In this work a phase-locked loop (PLL) is presented, which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates, and thus the proposed algorithm is referred as fixed reference frame PLL (FRF-PLL). In fact, the FRF-PLL does not require transformation of variables into the synchronous frame coordinates as in most PLL schemes. The design of the FRF-PLL is based on a complete description of the source voltage involving both positive and negative sequences in stationary coordinates and considering the angular frequency as an uncertain parameter. Therefore, the FRF-PLL is intended to perform properly under severe unbalanced conditions, and to be robust against angular frequency variations in the three-phase source voltage signal. Although not considered in the design, it is shown that the scheme is also robust against harmonic distortion present in the source voltage signal.

40 citations


Journal ArticleDOI
TL;DR: A new time-discrete predictive current control for permanent-magnet synchronous motor (PMSM) which follows a reference step in two sampling periods which stands out by using a permanent identification which allows fast control even if the motor parameters are changing.
Abstract: This paper presents a new time-discrete predictive current control for permanent-magnet synchronous motor (PMSM) which follows a reference step in two sampling periods. The control stands out by using a permanent identification which allows fast control even if the motor parameters are changing. The identification analyzes the current response of each switch state of the voltage source inverter. This kind of identification works without any test signals. The proposed new predictive current control will be described in detail. The simulation results show the feasibility and effectiveness of the proposed controller, compared to proportional integral control and dead-beat control in the rotor synchronous frame. Furthermore, the new control strategy will be verified in experiments. The control hardware only needs a field-programmable gate array and analog-to-digital converters. To verify the control, a prototype 14 kW PMSM servo-drive system is used.

38 citations


Journal ArticleDOI
TL;DR: A novel harmonic-free power factor correction (PFC) topology based on T-type active power filter (APF) is proposed in this paper and it is a natural filter for the non-linear load harmonic disturbances.

33 citations


Patent
13 Mar 2008
TL;DR: In this article, a delay-compensated offset based on a synchronous frame current and a commanded current was used to control an AC motor via an inverter, and a voltage error was calculated based on an anti-windup offset and the current error.
Abstract: Methods and systems are provided for controlling an AC motor via an inverter. The method includes determining a delay-compensated offset based on a synchronous frame current, producing a current error based on a synchronous frame current and a commanded current, producing a voltage error based on an anti-windup offset and the current error, producing a commanded voltage based on the delay-compensated offset and the voltage error, and providing the inverter with the commanded voltage.

22 citations


Journal Article
TL;DR: In this paper, the frequency characteristics of d-q synchronous transformations were analyzed and compared with the traditional bind-pass filters based on the frequency-domain analytical models, and an instantaneous positive-negative sequence frame was proposed as an expansion of traditional symmetrical components theory.
Abstract: The d-q harmonic detecting algorithms are dominant methods to generate current references for active power filters (APF). They are often implemented in the synchronous frame and time domain. This paper researches the frequency characteristics of d-q synchronous transformations, which are closely related to the analysis and design issues of control system. Intuitively, the synchronous transformation is explained with amplitude modulation (AM) in this paper. Then, the synchronous filter is proven to be a time-invariant and linear system, and its transfer function matrix is derived in the stationary frames. These frequency-domain models imply that the synchronous transformation has an equivalent effect of frequency transformation. It is because of this feature, the d-q method achieves band-pass characteristics with the low pass filters in the synchronous frame at run time. To simplify these analytical models, an instantaneous positive-negative sequence frame is proposed as expansion of traditional symmetrical components theory. Furthermore, the synchronous filter is compared with the traditional bind-pass filters based on these frequency-domain analytical models. The d-q harmonic detection methods are also improved to eliminate the inherent coupling effect of synchronous transformation. Typical examples are given to verify previous analysis and comparison. Simulation and experimental results are also provided for verification.

12 citations


01 Jan 2008
TL;DR: In this article, an all-digital hybrid controller called single synchronous frame hybrid (SSFH) controller concerning to special nonlinear load is presented, which operates in an SSF mixing conventional PI with repetitive controller.
Abstract: Shunt active power filters (APF) have been proved as effective means to compensate distorted currents caused by nonlinear loads in power distribution systems. This paper presents an all-digital hybrid controller, called single synchronous frame hybrid (SSFH) controller concerning to special nonlinear load. The hybrid controller operates in an SSF mixing conventional PI with repetitive controller. This approach can get zero state error and improve robustness. A detailed design criterion for the SSFH controller is presented based on a frequency-response approach. The design is performed for the particular application of three-phase shunt active filter and several experimental results are also presented to show the good behavior of the closed-loop system.

10 citations


Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this paper, ripple correlation control (RCC) is used to minimize the input power of an induction motor while maintaining the required output power, and a Simulinkreg simulation shows the convergence of ripple correlation controller to the optimum operating point that was determined by hardware experiments.
Abstract: This paper elaborates on the application of ripple correlation control (RCC) to induction motor input power minimization. Simulations, hardware experiments, and frequency analyses verify that the direct component of the rotor flux in the synchronous frame (lambdae dr) can be adjusted to minimize the input power to the motor while maintaining the required output power. Motor characteristics are shown to give a convex input power function with respect to lambdae dr which could be feasible for optimization using RCC. Sensitivity analyses based on RCC of a boost converter and for an induction motor are presented. A Simulinkreg simulation shows the convergence of the ripple correlation controller to the optimum operating point that was determined by hardware experiments. Other results include the use of flux estimators from stator-side voltage and current measurements. Efficiency improvement has been verified across the load torque range, including light load conditions.

9 citations


01 Jan 2008
TL;DR: In this paper, an identification method based on perturbation of reactive power is proposed to overcome this problem, which is suitable for use with virtual flux oriented control and enables maintain unity power factor not only at PCC but also further into the grid, including lines and transformer leakage inductance.
Abstract: Use of renewable energy sources is raising for grid connected systems, for which higher power quality requirements are being issued. Monitoring the grid impedance ensure stable operation of the controller and proper connection and disconnection from the grid. Thus it is vital to know the value of grid or transformer distributed impedance in given time, instead assuming a constant value in controller. To overcome this problem an identification method based on perturbation of reactive power is proposed. The normally inductive character of the grid used together with synchronous frame current controller have cross coupling terms which are used in analysis. This method is suitable for use with virtual flux oriented control. It uses two current sensors and one dc link voltage sensor. Method enables maintain unity power factor not only at PCC but also further into the grid, including lines and transformer leakage inductance.

9 citations


Proceedings ArticleDOI
Rui Li1, Dehong Xu1, Ke Ma1
16 May 2008
TL;DR: A novel rotating d-q-0 synchronous frame based space vector PWM control strategy is introduced to minimize neutral current in the four-wire input boost PFC rectifier.
Abstract: For higher power application, the six-switch three-phase boost rectifier is a preferred topology. Compared with three-phase three-wire boost rectifier, the three-phase four-wire input rectifier is more usually used in uninterrupted power supply (UPS) systems to prevent the load neutral from floating. In this paper, the four-wire input boost PFC rectifier is modeled and analyzed; the origin of the neutral current is analyzed; a novel rotating d-q-0 synchronous frame based space vector PWM control strategy is introduced to minimize neutral current. With this control strategy, the DC-link voltage is controlled constant and balanced. The three-phase input current is sinusoidal with a unity power factor. This control strategy can be used in the four-wire input AC/DC/AC converter and active power filter. A 40 kVA DSP (TMS320F2407A) controlled three-phase four-wire boost PFC rectifier prototype circuit is built to examine the character and verify the validity of the control strategy.

7 citations


Proceedings ArticleDOI
01 Nov 2008
TL;DR: In this article, a direct torque control (DTC) algorithm for six phase induction machines (6PIMs) is introduced, which is based on deriving the voltage vectors in a synchronous frame rotating with the stator flux.
Abstract: In this paper, a new direct torque control (DTC) algorithm for six phase induction machines (6PIM) will be introduced. The machine has two sets of three phase windings spatially shifted by 60 electrical degrees. This approach is based on deriving the voltage vectors in a synchronous frame rotating with the stator flux. It leads to a fixed switching frequency and low torque ripples. Simulation and experimental results show satisfactory performances and validate the proposed method.

Proceedings ArticleDOI
13 Jul 2008
TL;DR: In this paper, a robust model reference adaptive control (RMRAC) scheme for the PMSM (Permanent Magnet Synchronous Motor) current regulation is proposed in a synchronous frame which is completely free from the parameterpsilas uncertainty.
Abstract: A new RMRAC (Robust Model Reference Adaptive Control) scheme for the PMSM (Permanent Magnet Synchronous Motor) current regulation is proposed in a synchronous frame which is completely free from the parameterpsilas uncertainty. A current regulator of PMSM is the inner most loop of electromechanical driving systems and plays a foundation role in the control hierarchy. When the PMSM runs in high speed, the cross-coupling terms must be compensated precisely for large system BW. In the proposed RMRAC, the input signal is composed of a calculated voltage defined by MRAC law and an output of the disturbance compensator. The gains of feed forward and feedback controller are estimated by the proposed modified gradient method, where the system disturbances are assumed as filtered current regulation errors. After the compensation of the system disturbance from error information, the corresponding voltage is fed forward to control input to compensate for real disturbances. The proposed method robustly compensates the system disturbance and cross-coupling term. It also shows a good real-time performance due to the simplicity of control structure. Through real experiments, the efficiency of the proposed method is verified.

Patent
18 Apr 2008
TL;DR: In this article, a command limiter is implemented as a circular voltage limiter, which consists of an amplitude limiter which limits the amplitude component to the maximum fundamental voltage component of the inverter and a polar to Cartesian coordinate converter which converts the limited amplitude component and the phase component into modified d-q command voltages.
Abstract: A control architecture for an electrical inverter includes a command limiter implemented as a circular voltage limiter. The command limiter includes a Cartesian to Polar coordinate converter connected to a command source such as a command line. B. a synchronous frame current controller is coupled. The Cartesian to Polar Coordinate converter provides amplitude and phase components for d-q command voltages. The command limiter further comprises an amplitude limiter which limits the amplitude component to the maximum fundamental voltage component of the inverter and a polar to Cartesian coordinate converter which converts the limited amplitude component and the phase component into modified d-q command voltages.

Patent
Masato Kobayashi1, Isao Suzuki1
24 Dec 2008
TL;DR: In this article, a transmitting apparatus for encapsulating data received from an asynchronous network to a frame of a specified format and transmitting the received data as a synchronous frame to a synchronized network is described.
Abstract: A transmitting apparatus for encapsulating data received from an asynchronous network to a frame of a specified format and transmitting the received data as a synchronous frame to a synchronous network, includes a code generating part configured to generate an error detection code for detecting an error in the received data and add the error detection code to the received data, an inverting part configured to perform bit inversion in which the received data added with the error detection code are converted to bit inverted received data, a selecting part configured to select either the received data or the bit inverted received data according to the number of bit patterns included in the received data and the bit inverted received data, and a transmitting part configured to transmit either the received data added with the error detection code or the bit inverted received data selected by the selecting part.

Proceedings ArticleDOI
24 Oct 2008
TL;DR: A complex-vector time-delay control scheme that can achieve high tracking precision and disturbance rejection, complementing the basic requirement of fast and accurate fundamental positive-sequence tracking, render the proposed scheme as an attractive alternative for high-end converter control.
Abstract: Precise controlling of current produced by power converters is an important topic that has attracted interests over the last few decades. With the recent proliferation of grid-tied converters where the control of power flow is indirectly governed by the accuracy of current tracking, motivation to develop dynamically fast and accurate current controllers is even more intensive with more features expected to be embedded within a single control module. Believing in its continual importance, this paper contributes by proposing a complex-vector time-delay control scheme that can achieve high tracking precision and disturbance rejection. In principle, the proposed scheme can either be implemented solely in the stationary frame or in a ldquomixedrdquo stationary and synchronous frame, termed as mixed frame in the paper. Regardless of the frame orientation chosen, the scheme always exhibits ease of implementation since only a small amount of memory space for storing time-delayed values and simple arithmetic computations are needed for its physical realization. In addition to that, other advantages of the scheme include its abilities to compensate for negative-sequence, load and grid harmonic components using a set of load-matching control characteristics that are less sensitive to external noise interferences. These added features, complementing the basic requirement of fast and accurate fundamental positive-sequence tracking, render the proposed scheme as an attractive alternative for high-end converter control. Lastly, for proving its practicality, experimental testing of the scheme is performed digitally using a commercial grid converter with some informative results captured and compared with those of an existing scheme.

Patent
12 Nov 2008
TL;DR: In this paper, the local pseudo-random sequences are generated before the synchronization locking, and a passage of data in the pseudorandom sequences is taken out to correlate with the received data to output the peak position.
Abstract: The invention relates to a frame synchronization method and a system. The method is characterized in that the local pseudo-random sequences are generated before the synchronization locking, and a passage of data in the pseudo-random sequences is taken out to correlate with the received data to output the peak position; the displacement of the peak position is obtained according to the peak positions and locking is carried out by making use of the relation between the displacement of the current peak position and the displacement of the former peak position. By adopting different arrangements for the local pseudo-random (PN) sequences before and after the synchronous frame locking and adopting different locking confidence strategies, the method and the system ensure the stability of the peak positions and shorten the synchronization time, thus achieving more stable synchronization.

Patent
23 May 2008
TL;DR: In this article, the authors propose a scheme to enhance the line use efficiency of a synchronous network in a transmitter, which encapsulates received data from an asynchronous network into a frame of a prescribed format.
Abstract: PROBLEM TO BE SOLVED: To enhance line use efficiency of a synchronous network in a transmitter. SOLUTION: The transmitter, which encapsulates received data from an asynchronous network into a frame of a prescribed format to be transmitted to the synchronous frame as the synchronous frame, includes: a code generation means for generating an error detection code of the received data to be added to the received data; an inversion means for performing bit inversion of the received data to which the error detection code is added; and a selection means for selecting either of the received data or the inverted data on the basis of the number of prescribed bit patterns included in each of the received data and the inverted data whose bit inversion is performed by the inversion means to make the selected data as the synchronous network with the error detection code. COPYRIGHT: (C)2010,JPO&INPIT

Journal Article
TL;DR: In this paper, a wind energy conversion system (WECS) model is presented, including wind turbine and brushless doubly-fed machine working as a generator, and a double-loop controller is applied to make the system follow the characteristics of the reference model.
Abstract: A wind energy conversion system(WECS) model is presented,including wind turbine and brushless doubly-fed machine working as a generator.The WECS is decoupled into two subsystems by synchronous frame transformation.Furthermore,a double-loop controller is applied to make the system follow the characteristics of the reference model.It’s well known that a particular wind speed corresponds to an maximum powerr output.By considering the complex structure of the BDFM(brushless doubly-fed machine),a disturbance rejection controller(ADRC) is used in the inner loop of the control system in order to achieve power-decoupling control.Besides,linear model following control(LMFC) is used in the outer loop to make the generator effectively track the characteristics of the model.Simulation results indicate that double-loop controller enables the output power of the system to track the given power and achieves perfect model following,which verifies the validity of the control algorithm.

Patent
31 Jan 2008
TL;DR: In this paper, the synchronous backup node 100 detects that synchronous frames transmitted from the startup nodes are deficient due to the occurrence of a failure or the like in one of the subscription nodes subscribing to the startup process, and transmits a pseudo synchronous frame simulating the synchronized frame to a communication bus 10.
Abstract: PROBLEM TO BE SOLVED: To start an ordinary communication operation by surely executing startup processing while effectively suppressing the generation of branches by making the number of startup nodes to a necessary minimum. SOLUTION: At least one of non-startup nodes not subscribing to a startup process is set as a synchronous backup node 100. When the synchronous backup node 100 detects that synchronous frames transmitted from the startup nodes are deficient due to the occurrence of a failure or the like in one of the startup nodes subscribing to the startup process, the synchronous backup node 100 subscribes to the startup process and transmits a pseudo synchronous frame simulating the synchronous frame to a communication bus 10. COPYRIGHT: (C)2008,JPO&INPIT

Patent
04 Feb 2008
TL;DR: In this article, a layer processing method and an apparatus for a synchronous Ethernet are provided to enable the synchronized Ethernet to be compatible with a commercial device by receiving parameters for the synchronous wired Ethernet from a PHY device and a MAC device.
Abstract: A layer processing method and an apparatus for a synchronous Ethernet are provided to enable the synchronous Ethernet to be compatible with a commercial device by receiving parameters for the synchronous Ethernet from a PHY device and a MAC device A PHY layer(300) is directly related to a hardware layer as the lowest layer of an OSI(Open Systems Interconnection) structure, and transmits or receives an Ethernet frame An asynchronous frame unit(330) includes a MAC(Media Access Control) layer(350), and a bridging layer(360) The MAC layer delivers the Ethernet frame to the PHY layer and packetizes the Ethernet frame The bridging layer determines whether the Ethernet frame is delivered to an upper layer and transmits the Ethernet frame to a corresponding destination A synchronous frame unit(320) inserts a MAC address, an Ethernet type, and a synchronous header to the synchronous frame from an upper layer

Patent
03 Nov 2008
TL;DR: In this article, an apparatus and a method for controlling 3 phase LC filter for driving an induction motor are provided to minimize the signal detection for control by detecting only the output voltage of the filter.
Abstract: An apparatus and a method for controlling 3 phase LC filter for driving an induction motor are provided to minimize the signal detection for control by detecting only the output voltage of the filter A transfer function of the LC filter is converted into a secondary low pass filter type by defining an LC filter circuit(20) in a synchronous frame The LC filter is controlled as the secondary low pass filter with various damping ratios by setting up a damping ratio of the LC filter defined in a synchronous frame to a desired value A voltage variation value is outputted to a PWM inverter(10) as a voltage instruction value for PWM control by calculating the voltage variation value according to the difference between a filter voltage instruction value and a currently detected filter voltage


Journal ArticleDOI
TL;DR: In this article, a modified gradient method is proposed to compensate the system disturbance from error information, where the corresponding voltage is fed forward to control input to compensate for real disturbances. And the gains of feed forward and feedback controller are estimated by the proposed modified gradients method, where system disturbances are assumed as filtered current regulation errors.
Abstract: A new RMRAC scheme far the PMSM current regulation is proposed in a synchronous frame, which is completely free from the parameter`s uncertainty. A current regulator of PMSM is the inner most loop of electromechanical driving systems and plays a foundation role in the control hierarchy. When the PMSM runs in high speed, the cross-coupling terms must be compensated precisely for large system BW. In the proposed RMRAC, the input signal is composed of a calculated voltage defined by MRAC law and an output of the disturbance compensator. The gains of feed forward and feedback controller are estimated by the proposed modified gradient method, where the system disturbances are assumed as filtered current regulation errors. After the compensation of the system disturbance from error information, the corresponding voltage is fed forward to control input to compensate for real disturbances. The proposed method robustly compensates the system disturbance and cross-coupling terms. It also shows a good realtime performance due to the simplicity of control structure. Through real experiments, the efficiency of the proposed method is verified.

Proceedings ArticleDOI
01 Dec 2008
TL;DR: In this paper, the authors proposed a solution to the unbalance problem of the input DC voltages of the nine-level NPC-VSI in dq synchronous frame.
Abstract: The aim of this paper is to give a solution to unbalance problem of the input DC voltages of the nine-level NPC-VSI in dq synchronous frame. For that, we used in high voltage and great power applications, one two-level PWM current rectifier-nine-level NPC VSI cascade. In the first part, we develop a knowledge model of the nine-level NPC VSI and propose a space vector modulation of this converter using eight bipolar carriers. After that, this study shows particularly the problem of the stability of the DC voltages of the inverter. Then, we propose a solution to the problem by employed closed loop regulation using classic PI regulator mode in d-q synchronous frame. We add a clamping bridge to stabilise the multi DC input voltages of the nine-level NPC VSI. This cascade found applications in great power and high voltage fields as electrical traction.