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Design Of Analog Cmos Integrated Circuits

Although the literature on university–industry links has begun to uncover the reasons for, and types of, collaboration between universities and businesses, it offers relatively little explanation of ways to reduce the barriers in these collaborations. This paper seeks to unpack the nature of the obstacles to collaborations between universities and industry, exploring influence of different mechanisms in lowering barriers related to the orientation of universities and to the transactions involved in working with university partners. Drawing on a large-scale survey and public records, this paper explores the effects of collaboration experience, breadth of interaction, and inter-organizational trust on lowering different types of barriers. The analysis shows that prior experience of collaborative research lowers orientation-related barriers and that greater levels of trust reduce both types of barriers studied. It also indicates that breadth of interaction diminishes the orientation-related, but increases transaction-related barriers. The paper explores the implications of these findings for policies aimed at facilitating university–industry collaboration.

Investigating the factors that diminish the barriers to university-industry collaboration

Classifications, applications, and design challenges of drones: A review

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

Textiles have been concomitant of human civilization for thousands of years. With the advances in chemistry and materials, integrating textiles with energy harvesters will provide a sustainable, environmentally friendly, pervasive, and wearable energy solution for distributed on-body electronics in the era of Internet of Things. This article comprehensively and thoughtfully reviews research activities regarding the utilization of smart textiles for harvesting energy from renewable energy sources on the human body and its surroundings. Specifically, we start with a brief introduction to contextualize the significance of smart textiles in light of the emerging energy crisis, environmental pollution, and public health. Next, we systematically review smart textiles according to their abilities to harvest biomechanical energy, body heat energy, biochemical energy, solar energy as well as hybrid forms of energy. Finally, we provide a critical analysis of smart textiles and insights into remaining challenges and future directions. With worldwide efforts, innovations in chemistry and materials elaborated in this review will push forward the frontiers of smart textiles, which will soon revolutionize our lives in the era of Internet of Things.

Smart Textiles for Electricity Generation.

In this paper, a highly power-efficient class-AB–AB Miller op-amp is discussed. The structure uses $g_{m}$ enhancement based on local common-mode feedback to provide class-AB operation with enhanced effective $g_{m}$ , open-loop gain, unity-gain frequency, and slew rate ( $SR$ ) without significant increase in quiescent power consumption. Utilization of a nonlinear load leads to large symmetric positive and negative $SR\text{s}$ . Stability over an extremely wide range of capacitive loads is achieved through a combination of Miller and phase-lead compensations. The unity-gain frequency does not show sensitivity to capacitive load values. A test chip prototype fabricated in 0.18- $\mu \text{m}$ CMOS technology shows 90.8-dB open-loop gain, 12.5-MHz bandwidth for a 25-pF load capacitance, and a factor $60~SR$ enhancement with maximum output current close to 1-mA and 43- $\mu \text{A}$ total static current.

A Highly Efficient Composite Class-AB–AB Miller Op-Amp With High Gain and Stable From 15 pF Up To Very Large Capacitive Loads

Three novel improved CMOS capacitance scaling schemes are presented and compared with some conventional schemes. The novel topologies that use a modified second-generation current conveyor, an improved cascode current mirror and an OTA with two outputs connected in current steering configuration provide higher values of Q and better frequency responses than conventional structures using basic current mirror schemes, as the simple current mirror or cascode current mirrors. Simulation results and some measurements of a chip prototype are presented. Copyright © 2011 John Wiley & Sons, Ltd.

Three novel improved CMOS C-multipliers

A new family of high performance buffers is introduced. It is characterized by very low output impedance, wide signal range, wide bandwidth, and low power dissipation, no DC level shift between input and output terminals and class AB operation. The proposed circuits are validated with simulations in 0.5/spl mu/m CMOS technology and with experimental results.

New improved CMOS class AB buffers based on differential flipped voltage followers

A novel current-mode analog multiplier/divider based on a voltage-translinear implementation of a geometric-mean circuit is presented, featuring favorable precision and wide dynamic range It is suitable for standard CMOS fabrication and can be successfully applied in a wide range of analog systems Two versions, based on stacked and up-down voltage-translinear loops, respectively, are described and verified by simulation

Antonio J. Lopez-Martin

Papers

A Highly Efficient Composite Class-AB–AB Miller Op-Amp With High Gain and Stable From 15 pF Up To Very Large Capacitive Loads

Three novel improved CMOS C-multipliers

New improved CMOS class AB buffers based on differential flipped voltage followers

Geometric-mean based current-mode CMOS multiplier/divider

Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing