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Arash Ahmadi

Researcher at University of Windsor

Publications -  193
Citations -  2072

Arash Ahmadi is an academic researcher from University of Windsor. The author has contributed to research in topics: Spiking neural network & Memristor. The author has an hindex of 18, co-authored 179 publications receiving 1520 citations. Previous affiliations of Arash Ahmadi include Islamic Azad University & Razi University.

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Notch stress concepts for the fatigue assessment of welded joints – Background and applications

TL;DR: In this paper, two variants of the linear-elastic notch stress concept for welded structures, one for thick walled and one for thin walled, with the reference radius rref = 1.00mm, derived by Radaj.
Journal ArticleDOI

Biologically Inspired Spiking Neurons : Piecewise Linear Models and Digital Implementation

TL;DR: A set of piecewise linear spiking neuron models, which can reproduce different behaviors, similar to the biological neuron, both for a single neuron as well as a network of neurons are presented.
Journal ArticleDOI

Biologically Inspired Spiking Neurons: Piecewise Linear Models and Digital Implementation

TL;DR: In this paper, a set of piecewise linear spiking neuron models, which can reproduce different behaviors, similar to the biological neuron, both for a single neuron as well as a network of neurons, are investigated in terms of digital implementation feasibility and costs, targeting large scale hardware implementation.
Journal ArticleDOI

Digital Multiplierless Implementation of Biological Adaptive-Exponential Neuron Model

TL;DR: Hardware synthesis and physical implementations on a field-programmable gate array show that the proposed models can produce biological behavior of different types of neurons with higher performance and considerably lower implementation costs compared with the original model.
Proceedings ArticleDOI

Optimized implementation of memristor-based full adder by material implication logic

TL;DR: An optimized memristor-based full adder design by material implication logic is presented, which needs 27 memristors and less area in comparison with typical CMOS-based 8-bit full adders.