A
Ashok K. Kapoor
Researcher at LSI Corporation
Publications - 62
Citations - 1993
Ashok K. Kapoor is an academic researcher from LSI Corporation. The author has contributed to research in topics: Layer (electronics) & Gate oxide. The author has an hindex of 23, co-authored 62 publications receiving 1993 citations. Previous affiliations of Ashok K. Kapoor include Avago Technologies.
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Patent
CAD for hexagonal architecture
Michael D. Rostoker,James S. Koford,Ranko Scepanovic,Edwin R. Jones,Gobi R. Padmanahben,Ashok K. Kapoor,Valeriv B. Kudryavtsev,Alexander E. Andreev,Stanislav V. Aleshin,Alexander S. Podkolzin +9 more
TL;DR: In this paper, a tri-directional three-layer metal routing scheme is proposed for hexagonal-shaped cells, where the conductors for interconnecting terminals of microelectronic cells are angularly displaced from each other by 60°.
Patent
Hexagonal field programmable gate array architecture
Michael D. Rostoker,James S. Koford,Ranko Scepanovic,Edwin R. Jones,Gobi R. Padmanahben,Ashok K. Kapoor,Valeriy B. Kudryavtsev,Alexander E. Andreev,Stanislav V. Aleshin,Alexander S. Podkolzin +9 more
TL;DR: In this article, a tri-directional three-layer metal routing is proposed for hexagonal-shaped cells, where the conductors for interconnecting terminals of microelectronic cells of an integrated circuit prefer to be angularly displaced from each other.
Patent
Low dielectric constant insulation layer for integrated circuit structure and method of making same
TL;DR: In this paper, a low dielectric insulation layer for an integrated circuit structure material, and a method of making same, is disclosed, which comprises a porous insulation layer, preferably sandwiched between non-porous upper and lower insulation layers.
Patent
Microelectronic integrated circuit including triangular CMOS "nand" gate device
Michael D. Rostoker,James S. Koford,Ranko Scepanovic,Edwin R. Jones,Gobi R. Padmanahben,Ashok K. Kapoor,Valeriy B. Kudryavtsev,Alexander E. Andreev,Stanislav V. Aleshin,Alexander S. Podkolzin +9 more
TL;DR: In this paper, the power supply connections and the selection of conductivity type (NMOS or PMOS) for the ANY and ALL elements can be varied to provide the device as having a desired NAND, NOR or OR configuration, in which the ANY element acts as a pull-up and the ALL element act as pull-down, or vice versa.
Patent
Architecture having diamond shaped or parallelogram shaped cells
Michael D. Rostoker,James S. Koford,Ranko Scepanovic,Edwin R. Jones,Gobi R. Padmanahben,Ashok K. Kapoor,Valeriy B. Kudryavtsev,Alexander E. Andreev,Stanislav V. Aleshin,Alexander S. Podkolzin +9 more
TL;DR: In this paper, a tri-directional three-layer metal routing is proposed for hexagonal-shaped cells, where the conductors for interconnecting terminals of microelectronic cells of an integrated circuit are preferrably formed in three different layers.