An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The outstanding properties of SiO2, which include high resistivity, excellent dielectric strength, a large band gap, a high melting point, and a native, low defect density interface with Si, are in large part responsible for enabling the microelectronics revolution. The Si/SiO2 interface, which forms the heart of the modern metal–oxide–semiconductor field effect transistor, the building block of the integrated circuit, is arguably the worlds most economically and technologically important materials interface. This article summarizes recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si–O–N (silicon oxynitride) gate dielectrics on Si based devices. We will emphasize an understanding of the limits of these gate dielectrics, i.e., how their continuously shrinking thickness, dictated by integrated circuit device scaling, results in physical and electrical property changes that impose limits on their usefulness. We observe, in conclusion, that although Si microelectronic devices...

Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

Power semiconductor devices and methods of manufacture

The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

Tri-gate devices and methods of fabrication

Lithography is a field in which advances proceed at a swift pace. This book was written to address several needs, and the revisions for the second edition were made with those original objectives in mind. Many new topics have been included in this text commensurate with the progress that has taken place during the past few years, and several subjects are discussed in more detail. This book is intended to serve as an introduction to the science of microlithography for people who are unfamiliar with the subject. Topics directly related to the tools used to manufacture integrated circuits are addressed in depth, including such topics as overlay, the stages of exposure, tools, and light sources. This text also contains numerous references for students who want to investigate particular topics in more detail, and they provide the experienced lithographer with lists of references by topic as well. It is expected that the reader of this book will have a foundation in basic physics and chemistry. No topics will require knowledge of mathematics beyond elementary calculus.

Principles of Lithography

By providing an ultrasonic irradiation apparatus for generating acoustic cavitation efficiently, it is intended to realize an ultrasonic therapeutic apparatus for generating the action of cavitation on a living body suitable for medical treatment of malignant tumors and medical treatment of thrombi and calculi, an ultrasonic diagnostic apparatus for generating cavitation for emphasizing an ultrasonic echo image such as a blood flow and utilizing the reflection capability of the cavitation, an ultrasonic chemical reaction accelerating apparatus, an ultrasonic cleaning apparatus or an ultrasonic sterilizing apparatus. Irradiation focus/code signals for defining irradiated acoustic fields of a fundamental wave and a second harmonic wave as well as focus positions/acoustic pressure distribution forms of the respective waves are applied from an irradiation unit main control circuit to drive phase generating circuits. Generated drive phases are applied to drive signal generating circuits, generated drive signals are applied to element drive circuits and a group of fundamental frequency elements and a group of second harmonic elements are driven. The drive phases are controlled such that the fundamental wave and second harmonic wave are superimposed on each other in a medium near a focal point, thus generating acoustic caviation locally and efficiently.

Ultrasonic irradiation apparatus and processing apparatus based thereon

By forming a highly stable Al2O3 gate oxide on a C-H bonded channel of diamond, high-temperature, and high-voltage metal-oxide-semiconductor field-effect transistor (MOSFET) has been realized. From room temperature to 400 °C (673 K), the variation of maximum drain-current is within 30% at a given gate bias. The maximum breakdown voltage (VB) of the MOSFET without a field plate is 600 V at a gate-drain distance (LGD) of 7 μm. We fabricated some MOSFETs for which VB/LGD > 100 V/μm. These values are comparable to those of lateral SiC or GaN FETs. The Al2O3 was deposited on the C-H surface by atomic layer deposition (ALD) at 450 °C using H2O as an oxidant. The ALD at relatively high temperature results in stable p-type conduction and FET operation at 400 °C in vacuum. The drain current density and transconductance normalized by the gate width are almost constant from room temperature to 400 °C in vacuum and are about 10 times higher than those of boron-doped diamond FETs.

C-H surface diamond field effect transistors for high temperature (400 °C) and high voltage (500 V) operation

Diamond has unique physical properties, which show great promise for applications in the next generation power devices. Hydrogen-terminated (C–H) diamond metal–oxide–semiconductor field-effect transistors (MOSFETs) often have normally-on operation in devices, because the C–H channel features a p-type inversion layer; however, normally-off devices are preferable in power MOSFETs from the viewpoint of fail safety. We fabricated hydrogen-terminated (C–H) diamond MOSFETs using a partially oxidized (partial C–O) channel. The fabricated MOSFETs showed a high breakdown voltage of over 2 kV at room temperature and normally-off characteristics with a gate threshold voltage $\text{V}_{\mathrm{th}}$ of −2.5–−4 V.

Normally-Off C–H Diamond MOSFETs With Partial C–O Channel Achieving 2-kV Breakdown Voltage

A method of manufacturing a semiconductor integrated circuit device having a switching MISFET and a capacitor element formed over a semiconductor substrate, such as a DRAM, is disclosed. The dielectric film of the capacitor element is formed to be co-extensive with the capacitor electrode layer over it. The upper electrode of the capacitor element is formed to be larger than the lower electrode.

Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring

A method for growing a silicon-including film is disclosed in which the above film is grown on a surface of a substrate by using, as a discharge gas, a halogenide silicon gas or a gas mixture containing a halogenide silicon gas in a plasma deposition apparatus including a vacuum chamber, means for supplying microwave power to the vacuum chamber, means for forming a magnetic field in at least part of the vacuum chamber, means for introducing the discharge gas into the vacuum chamber, and means for holding the substrate within the vacuum chamber.

Atsushi Hiraiwa

Papers

Ultrasonic irradiation apparatus and processing apparatus based thereon

C-H surface diamond field effect transistors for high temperature (400 °C) and high voltage (500 V) operation

Normally-Off C–H Diamond MOSFETs With Partial C–O Channel Achieving 2-kV Breakdown Voltage

Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring

Method for growing silicon-including film by employing plasma deposition