Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

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High-κ gate dielectrics: Current status and materials properties considerations

A molecule containing a nitroamine redox center (2'-amino-4-ethynylphenyl-4'-ethynylphenyl-5'-nitro-1-benzenethiol) was used in the active self-assembled monolayer in an electronic device. Current-voltage measurements of the device exhibited negative differential resistance and an on-off peak-to-valley ratio in excess of 1000:1.

https://science.sciencemag.org/content/sci/286/5444/1550.full.pdf

Large On-Off Ratios and Negative Differential Resistance in a Molecular Electronic Device.

Hafnium and zirconium silicate (HfSixOy and ZrSixOy, respectively) gate dielectric films with metal contents ranging from ∼3 to 30 at. % Hf, or 2 to 27 at. % Zr (±1 at. % for Hf and Zr, respectively, within a given film), have been investigated, and films with ∼2–8 at. % Hf or Zr exhibit excellent electrical properties and high thermal stability in direct contact with Si. Capacitance–voltage measurements show an equivalent oxide thickness tox of about 18 A (21 A) for a 50 A HfSixOy (50 A ZrSixOy) film deposited directly on a Si substrate. Current–voltage measurements show for the same films a leakage current of less than 2×10−6 A/cm2 at 1.0 V bias. Hysteresis in these films is measured to be less than 10 mV, the breakdown field is measured to be EBD∼10 MV/cm, and the midgap interface state density is estimated to be Dit∼1–5×1011 cm−2 eV−1. Au electrodes produce excellent electrical properties, while Al electrodes produce very good electrical results, but also react with the silicates, creating a lower e l...

Hafnium and zirconium silicates for advanced gate dielectrics

Electron tunneling through self-assembled monolayers (SAM's) of alkanethiols is investigated using nanometer-scale devices. Temperature-dependent current-voltage measurements are performed on alkanethiol SAM's to distinguish between different conduction mechanisms. Temperature-independent electron transport is observed, proving that tunneling is the dominant conduction mechanism of alkanethiols, as well as exhibiting an exponential dependence of tunneling current on the molecule length with a decay coefficient \ensuremath{\beta}. From the bias dependence of \ensuremath{\beta}, a barrier height ${\ensuremath{\Phi}}_{B}$ of $1.39\ifmmode\pm\else\textpm\fi{}0.01\mathrm{eV}$ and a zero-field decay coefficient ${\ensuremath{\beta}}_{0}$ of $0.79\ifmmode\pm\else\textpm\fi{}0.01{\AA{}}^{\ensuremath{-}1}$ are determined for alkanethiols.

Mechanism of electron conduction in self-assembled alkanethiol monolayer devices

Hafnium silicate (HfSixOy) gate dielectric films with ∼6 at. % Hf exhibit significantly improved leakage properties over SiO2 in the ultrathin regime while remaining thermally stable in direct contact with Si. Capacitance–voltage measurements show an equivalent oxide thickness (tox) of less than 18 A for a 50 A HfSixOy film deposited directly on a Si substrate, with no significant dispersion of the capacitance for frequencies ranging from 10 kHz to 1 MHz. Current–voltage measurements show for the same film a leakage current of 1.2×10−6 A/cm2 at 1 V bias. Hysteresis in these films is measured to be less than 20 mV, the breakdown field is measured to be EBD∼10 MV/cm, and the midgap interface state density is Dit∼1011 cm−2 eV−1. Cross-sectional transmission electron microscopy shows no signs of reaction or crystallization in HfSixOy films on Si after being annealed at 800 °C for 30 min.

Electrical properties of hafnium silicate gate dielectrics deposited directly on silicon

We report a 250nm InP HBT MMIC that demonstrates record output power at 44 GHz for its chip size, having a small signal bandwidth of 25 - 50 GHz, and operating from a 2.5-2.8 V supply. The reported power amplifier delivers up to 185 mW and has a peak PAE of 38% at 44 GHz. The results in this work highlight the relevance of 250nm InP HBT devices for emerging size-constrained platforms including MIMO communication front-ends and radar applications.

185mW InP HBT Power Amplifier with 1 Octave Bandwidth (2550GHz), 38% peak PAE at 44GHz and Chip Area of 276 x 672 μm 2

Compared to SiGe,InP HBTs offer superior electron transport but inferior scaling and parasitic reduction.Figures of merit for mixed-signal ICs are developed and HBT scaling laws for improved circuit speed are introduced.Device and circuit results are summarized, including >370 GHz f W &fmax HBTs,174 GHz amplifiers,75 GHz power amplifiers,87 GHz static frequency dividers, and 8 GHz '6 ADCs.To compete with 100 nm SiGe processes,InP must be similarly scaled.Device structures and initial results are shown for two processes intended for high-yield fabrication of low-parasitic InP HBTs at ~300 nm emitter width.

InP Bipolar Transistors: High Speed Circuits and Manufacturable Submicron Fabrication Processes

We have analyzed the effect of disorder in both the well and barriers of a resonant tunneling diode (RTD). If the disorder is limited solely to the barriers, a good peak-to-valley ratio (PVR) is expected. We describe a general guideline relating the PVR to the bulk mobility and effective mass of the well material of an RTD. We compare the effects of correlated versus uncorrelated disorder on the valley current. We discuss why interband tunnel devices such its the Esaki diode are more robust than RTDs in the presence of disorder.

Resonant tunneling in disordered materials such as SiO/sub 2//Si/SiO/sub 2/

MBE growth of InP-based HBTs on GeOI/Si substrates is described. A GaAs buffer is nucleated on the GeOI; then a graded InAlAs metamorphic buffer transitions the lattice constant to InP. TEM shows minimal anti-phase boundaries and limited dislocations propagating into the device layers. Large area DC parameters are similar to LM HBTs grown on InP. Small area devices exhibit peak current gain cutoff frequency (ft) of 170 GHz at 2 mA/mum2 nominal collector current density. Initial work involving selective epitaxial growth on patterned Ge substrates for future integration is also discussed.

MBE growth of InP-HBT structures on Ge-on-insulator/Si substrates by MBE

High-quallity ZnS layers on silicon have recently been realized by initiating MBE growth on a vicinal Si (001) surface that has been terminated with a single monolayer (ML) of As. We report the first measurement of the electronic transport properties of the ZnS/As( IML)/n-Si(OOl) heterostructure. Temperature-dependant current-voltage measurements show that the transport is characterized by an activation energy of 1.0W0.04 teV for the Si/ZnS conduction band offset. A similar activation energy of 1.02+0.04 eV is obtained for the opposite bias polarity, corresponding to transport over the AllZnS Schottky barrier.

http://ieeexplore.ieee.org/iel4/5669/15178/00711606.pdf

Bobby Brar

Papers

185mW InP HBT Power Amplifier with 1 Octave Bandwidth (2550GHz), 38% peak PAE at 44GHz and Chip Area of 276 x 672 μm 2

InP Bipolar Transistors: High Speed Circuits and Manufacturable Submicron Fabrication Processes

Resonant tunneling in disordered materials such as SiO/sub 2//Si/SiO/sub 2/

MBE growth of InP-HBT structures on Ge-on-insulator/Si substrates by MBE

offset measurement of the ZnS/Si(OO 1) heterojunction