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Cauligi S. Raghavendra
Researcher at University of Southern California
Publications - 277
Citations - 21409
Cauligi S. Raghavendra is an academic researcher from University of Southern California. The author has contributed to research in topics: Wireless sensor network & Hypercube. The author has an hindex of 48, co-authored 275 publications receiving 20869 citations. Previous affiliations of Cauligi S. Raghavendra include University of California, Los Angeles & Washington State University.
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Large-Scale Unsupervised Deep Representation Learning for Brain Structure.
TL;DR: This paper presents a novel large-scale deep unsupervised approach to learn generic feature representations of structural brain MRI scans, which requires no specialized domain knowledge or manual intervention and produces low-dimensional representations of brain structure that can be used to reconstruct brain images with very low error.
Journal ArticleDOI
On Minimizing the Completion Times of Long Flows Over Inter-Datacenter WAN
TL;DR: This work proposes a routing approach that uses the remaining sizes and paths of all ongoing flows to minimize the worst case completion time of incoming flows assuming no knowledge of future flow arrivals, and proposes BWRH, a heuristic to quickly generate an approximate solution.
Proceedings ArticleDOI
Power aware coding for spatio-temporally correlated wireless sensor data
TL;DR: A power aware coding scheme, called EESPIHT, is devised which exploits the spatio-temporal correlation of multiple sensor readings and is made resilient to channel errors and selects an error correcting code based on source coding information and transmission power so that energy dissipation is minimized.
Proceedings ArticleDOI
Optimal joint load balancing and routing in message switched computer networks
TL;DR: The load balancing and routing problems are combined as a single problem to capture the interaction between them and an algorithm which gives an optimal solution is obtained.
Journal ArticleDOI
Parallel implementation of a ray tracing algorithm for distributed memory parallel computers
TL;DR: This paper presents a parallel implementation of a ray tracing algorithm on the Intel Delta parallel computer, and balances load among processors by distributing subimages to processors in a global fashion based on previous workload requests.