C
Christophe Desmouliers
Researcher at Illinois Institute of Technology
Publications - 10
Citations - 75
Christophe Desmouliers is an academic researcher from Illinois Institute of Technology. The author has contributed to research in topics: Field-programmable gate array & Discrete wavelet transform. The author has an hindex of 5, co-authored 10 publications receiving 71 citations.
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Journal ArticleDOI
System-on-Chip Design Using High-Level Synthesis Tools
Erdal Oruklu,Richard Hanley,Semih Aslan,Christophe Desmouliers,Fernando Martinez Vallina,Jafar Saniie +5 more
TL;DR: This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis using HLS tools and Fast Fourier Transform implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware.
Proceedings ArticleDOI
HW/SW co-design platform for image and video processing applications on Virtex-5 FPGA using PICO
TL;DR: Several examples of video processing applications, such as a Canny edge detector, motion detector and object tracking that have been realized using IVPP for real-time video processing are presented.
Journal ArticleDOI
Image and video processing platform for field programmable gate arrays using a high-level synthesis
TL;DR: The IVPP is implemented on a Xilinx Virtex-5 FPGA using a high-level synthesis and can be used to realise and test complex algorithms for real-time image and video processing applications.
Journal ArticleDOI
Discrete wavelet transform realisation using run-time reconfiguration of field programmable gate array (FPGA)s
TL;DR: Three different hardware architectures for implementing multiple wavelet kernels for discrete wavelet transform are presented and FPGA synthesis results for simultaneous implementation of six different wavelets for the proposed methods are presented.
Proceedings ArticleDOI
Adaptive 3D ultrasonic data compression using distributed processing engines
TL;DR: A fast and scalable data compression System-on-Chip (SoC) architecture based on Discrete Wavelet Transform (DWT) is proposed that can process A-Scan, B-Scan and C-Scan signals and images in real-time and reduce the data and bandwidth requirements substantially without degrading the signal fidelity.