Recent developments of phosphate glasses for a variety of technological applications, from rare-earth ion hosts for solid state lasers to low temperature sealing glasses, have led to renewed interest in understanding the structures of these unusual materials. In this review, spectroscopic and diffraction studies of simple phosphate glasses, including v-P2O5 and binary phosphate compositions, are described. Special attention is given to the structures of anhydrous ultraphosphate glasses, which have received close attention from the glass community only in the past six years.

Review: the structure of simple phosphate glasses

Nanoimprint lithography (NIL) is a high throughput, high-resolution parallel patterning method in which a surface pattern of a stamp is replicated into a material by mechanical contact and three dimensional material displacement. This can be done by shaping a liquid followed by a curing process for hardening, by variation of the thermomechanical properties of a film by heating and cooling, or by any other kind of shaping process using the difference in hardness of a mold and a moldable material. The local thickness contrast of the resulting thin molded film can be used as a means to pattern an underlying substrate on wafer level by standard pattern transfer methods, but also directly in applications where a bulk modified functional layer is needed. Therefore it is mainly aimed toward fields in which electron beam and high-end photolithography are costly and do not provide sufficient resolution at reasonable throughput. The aim of this review is to play between two poles: the need to establish standard processes and tools for research and industry, and the issues that make NIL a scientific endeavor. It is not the author’s intention to duplicate the content of the reviews already published, but to look on the NIL process as a whole. The author will also address some issues, which are not covered by the other reviews, e.g., the origin of NIL and the misconceptions, which sometimes dominate the debate about problems of NIL, and guide the reader to issues, which are often forgotten or overlooked.

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Nanoimprint lithography: An old story in modern times? A review

The phase-shifting mask consists of a normal transmission mask that has been coated with a transparent layer patterned to ensure that the optical phases of nearest apertures are opposite. Destructive interference between waves from adjacent apertures cancels some diffraction effects and increases the spatial resolution with which such patterns can be projected. A simple theory predicts a near doubling of resolution for illumination with partial incoherence σ < 0.3, and substantial improvements in resolution for σ < 0.7. Initial results obtained with a phase-shifting mask patterned with typical device structures by electron-beam lithography and exposed using a Mann 4800 10× tool reveals a 40-percent increase in usuable resolution with some structures printed at a resolution of 1000 lines/mm. Phase-shifting mask structures can be used to facilitate proximity printing with larger gaps between mask and wafer. Theory indicates that the increase in resolution is accompanied by a minimal decrease in depth of focus. Thus the phase-shifting mask may be the most desirable device for enhancing optical lithography resolution in the VLSI/VHSIC era.

Improving resolution in photolithography with a phase-shifting mask

A method and system are described to reduce process variation as a result of the semiconductor processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to modify the design and manufacture of integrated circuits.

Characterization adn reduction of variation for integrated circuits

Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.

Methods and systems for utilizing design data in combination with inspection data

Ten years ago Model-Based OPC (MB-OPC) was a research project of questionable usefulness, seen possibly as a fix until the next generation stepper was available. Today MB-OPC is one of the key technologies enabling 90nm production. In that brief span many technological challenges were resolved to allow MB-OPC to be performed on full chip layout with manageable computer resources and turnaround times. As MB-OPC has transitioned from a research to a production activity, several organizational challenges have arisen. Defining the steps and procedures involved in creating OPC techfiles has been necessary to allow the increased workload to be shared. Testing and documenting the OPC recipes has become a necessary discipline to ensure quality and repeatability in manufacturing. In addition to the engineers who create the OPC recipes, we now also have Fab OPC Engineers to support OPC verification and continuous improvement activities. Furthermore, the OPC process, i.e. the modification of the layout to account for the manufacturing process, has provided a tantalizing link between the design, process development and yield engineering communities. The EDA framework appears to provide a common language, however we are just beginning to ask the right questions to allow us to unlock the potential that appears so close. The paper will begin with a historical overview of the development of MB-OPC and describe the seemingly overwhelming obstacles, both computational and in mask fabrication that had to be overcome. The second part of the paper will deal with some of the problems that have arisen as MB-OPC has become a critical technology for high volume production. The final part of the paper will discuss how MB-OPC has changed the way that Lithography, Integration and Design engineers interact. Some examples of design/process interaction will be given as well as a discussion of future developments.

Full-chip lithography simulation and design analysis: how OPC is changing IC design

A method (100) of characterizing optical proximity correction designs includes performing a mathematical transform (160) on a first feature (150) and a second feature (167) each having a core portion (152) and a first OPC design and a second OPC design applied thereto, respectively. The method (100) further includes obtaining a metric (162) for the transformed first and second features, wherein the metric is based upon a capability of a pattern transfer system which will utilize masks employing the first and second features (150, 167) as a patterns thereon. One of the first feature or the second feature is then selected (170) based upon an application of the metric to the first and second transformed features (150, 167), thereby selecting the one of the first feature or the second feature which provides for a better pattern transfer performance.

Characterization and synthesis of OPC structures by fourier space analysis and/or wavelet transform expansion

A method and system of making a mask with a transparent substrate thereon is provided. A first resolution enhancement structure is formed on the first portion of the transparent substrate. A second resolution enhancement structure is formed on a second portion of the transparent substrate, with the second resolution enhancement structure different from the first resolution enhancement structure.

Semiconductor manufacturing resolution enhancement system and method for simultaneously patterning different feature types

A method of performing poly level lithography in manufacturing an integrated circuit using a phase shift mask in a step and repeat optical tool where the phase assignment for said phase shift mask is determined by a technique which determines, without assignment conflict, the Intersection of the gate pattern with the active gate pattern and which divides the Intersection into categories of stacks where a slightly different phase assignment rules is employed for the different stacks.

Method of optical lithography using phase shift masking

In this paper we discuss some of the problems and solutions discovered when implementing 2-mask strong phase shifter designs for the poly gate level in logic designs. Experimental results are presented showing pattern fidelity for different reticle designs. Simulations are presented indicating the improvement in pattern fidelity that can be expected from using OPC. Simulations, PSM assignment and model-based OPC correction are performed by the Calibre WORKbench, Calibre DRC, Calibre PSMgate and Calibre OPCpro tools from Mentor Graphics. In conclusion, we show that while fairly simple designs can be used to achieve 250 nm design rules (approximately 150 nm gates), in order to achieve both pattern fidelity as well as small feature size it is necessary to use 3-layer/phase-aware model-based OPC to correct for pattern distortion for design rules of 180 nm and below (approximately 100 nm phase-shifted gates).

Christopher A. Spence

Papers

Full-chip lithography simulation and design analysis: how OPC is changing IC design

Characterization and synthesis of OPC structures by fourier space analysis and/or wavelet transform expansion

Semiconductor manufacturing resolution enhancement system and method for simultaneously patterning different feature types

Method of optical lithography using phase shift masking

Integration of optical proximity correction strategies in strong phase shifters design for poly-gate layers