Distributed generation system operate with grid in islanding condition will damage equipment,affect the safe and stable operation of power system,even threaten the safety of line maintenance peopleTherefore,studying on distributed generation system in islanding condition has practical significanceThis paper presents an overview of islanding detection methods for distributed generation systemsThe paper classifies islanding detection methodsFinally,its study direction in the future is also looked ahead

Review of islanding detection methods for distributed generation

Wide bandgap (WBG) devices offer the advantages of high frequency, high efficiency, and high power density to power converters due to their excellent performance. However, their low parasitic capacitance and fast switching speed also make them more susceptible to switching oscillations. The switching oscillations can cause voltage and current overshoots, shoot-through, electromagnetic interference, additional power loss, and even device damage, which can seriously affect the performance of power converters and systems. However, a comprehensive and in-depth overview is lacking on this topic. This article reviews the types, the causes and negative effects, the effects of parasitic parameters and suppression methods of these switching oscillations, which is helpful for practical engineering. First, the switching oscillations are divided into different types, and their causes and negative effects are reviewed. Then, the effects of different parasitic parameters on the switching oscillations are overviewed. It is found that due to the different physical structures of silicon carbide metal-oxide-semiconductor field-effect transistors, enhancement-mode gallium nitride high-electron mobility transistors (eGaN HEMTs), and cascode GaN HEMTs, the effects are also different. Finally, the main methods of suppressing the switching oscillations are summarized, and the advantages and disadvantages of these methods are presented. Furthermore, future research works on this topic and the conclusion of this paper are drawn, which will help readers deepen their understanding of the switching oscillations of WBG devices, and inspire readers to better use WBG devices for high-frequency and high-efficient power conversion.

A Review of Switching Oscillations of Wide Bandgap Semiconductor Devices

The CLLC bidirectional resonant converter has significant potential in battery chargers and dc microgrids, due to its bidirectional power transfer capability. To ensure uniform characteristics for bidirectional operation, secondary LC resonant tank components are usually designed to equal the primary LC components after reflection. This conventional design method is regarded as the symmetric design. It is used in applications where wide voltage regulation is not required, such as CLLC dc transformers. However, for bidirectional battery charger applications, the battery has a wide voltage range variation, and gain requirements during charging and discharging are different. These asymmetric characteristics could lead to undesirable large switching frequency range if a conventional symmetric CLLC design is employed. To address this issue, a detailed asymmetric parameters methodology (APM) is proposed in this article. It can design gain curves for charging and discharging modes separately. This enables overlapping of the switching frequency range for both modes, thereby reducing the bidirectional frequency range variation. It brings lower switching loss caused by excessive high frequency, and relieve the extra conduction loss and current stress of power switches as well. Finally, a detailed analysis of the proposed APM is provided and validated with simulations and experiments.

Bidirectional Resonant CLLC Charger for Wide Battery Voltage Range: Asymmetric Parameters Methodology

Wide-bandgap devices, such as silicon carbide and gallium nitride, have high switching speed potential. However, the actual speed in practical application is limited by circuit parasitics and interaction between high-side switch and low-side switch in a phase-leg configuration, known as crosstalk effect. This article proposes an isolated voltage source gate driver with crosstalk suppression capability to take full advantage of the inherent high switching speed ability of silicon-carbide devices. By applying variable gate voltage through the auxiliary circuit, the crosstalk problem can be mitigated. Using the original gate–source voltage as auxiliary circuit driving signal, the gate driver does not introduce any extra control signals, which avoids additional signal/power isolations and makes the auxiliary circuit very convenient to be implemented on the existing commercial gate driver. The auxiliary circuit makes the gate voltage rise from 0 V other than −5 V when the switch turns on, leading to faster switching speed and lower switching loss compared with a traditional gate driver. LTSPICE simulation and double pulse test experiment based on 1.2-kV/60-A silicon-carbide MOSFETs are conducted to evaluate the crosstalk suppression capability of the proposed gate driver.

Smart Self-Driving Multilevel Gate Driver for Fast Switching and Crosstalk Suppression of SiC MOSFETs

Silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) are required to be connected in series to meet the high-voltage requirement since the blocking voltage of a single device is limited. In order to solve the voltage unbalancing problem in such a series-connection application, a single voltage-balancing gate driver combined with limiting Snubber circuits is proposed in this article. This gate driver only requires one standard driver circuit to drive two series-connected SiC MOSFETs by adding simple coupling circuits, and limiting Snubber circuits are applied for voltage balancing, and thus, low-cost, simple structure and high reliability are acquired. The analysis is given to demonstrate the working process of such a circuit structure, and the key parameters’ design and setting are focused on. In the LTspice simulation of two SiC MOSFETs in series, the proposed gate driver shows good voltage balancing performance as the power loop current increasing. Besides, the branch of series-connected SiC MOSFETs is in reliable ON- or OFF-state during steady process. Finally, the experimental results further verify the performance of proposed single voltage-balancing gate driver.

A Single Voltage-Balancing Gate Driver Combined With Limiting Snubber Circuits for Series-Connected SiC MOSFETs

In this article, a high-efficiency high-power-density wide-bandgap-based CLLC resonant converter with a low-stray-capacitance and well-heat-dissipated planar transformer is presented, which is used as the isolated dc–dc stage for an electric vehicle on-board charger. A generalized planar transformer design methodology is proposed and validated by practical designs and experimental tests. A novel and simple transformer configuration is proposed to reduce the winding stray capacitance and enhance the winding thermal dissipation. The proposed transformer configuration is compared with different planar transformer designs, and the tradeoffs of employing the proposed design are well analyzed. Moreover, the system design and optimization of the high-efficiency high-power-density CLLC resonant converter is studied. The proposed transformer design and the system optimization approach are employed in a 6.6-kW/500-kHz CLLC resonant converter prototype. The prototype achieves a peak efficiency of 97.85% and a power density of 114 W/in $^\text {3}$ .

High-Efficiency High-Power-Density CLLC Resonant Converter With Low-Stray-Capacitance and Well-Heat-Dissipated Planar Transformer for EV On-Board Charger

LLC and CLLC resonant converters are good candidates for the isolated dc-dc stage in EV on-board chargers due to their capability of achieving zero-voltage-switching (ZVS) at full load range. The synchronous rectifier (SR) is usually utilized to reduce the conduction loss and improve the system efficiency compared with the conventional diode bridge rectifier. In this paper, a high-dv/dt-immune, fine-controlled and parameter-adaptive gate driving scheme is presented for GaN-based synchronous rectifier in EV on-board chargers. A novel self-driven SR drain-to-source voltage sensing circuit is proposed. The circuit provides a low-impedance bypassing path for the displacement current induced by the high dv/dt, which addresses the over-voltage and oscillation issues for the controller input. The detailed operating principles and the design considerations of the novel sensing circuit are discussed as well. Moreover, the adaptive SR on-time tuning algorithm is implemented, which avoids the influence from the loop stray inductance and the propagation delay in the path and reaches the SR zero current turn-off moment with fine accuracy. A 3.3 kW, 500 kHz CLLC resonant converter prototype is built to validate the proposed SR gate driving scheme. With the employment of the proposed gate driving scheme, the SR almost achieves zero current turn-off for the whole operating frequency range. The prototype demonstrates the peak efficiency of 97.6% and the power density of 130 W/inch3.

High-dv/dt-Immune Fine-Controlled Parameter-Adaptive Synchronous Gate Driving for GaN-Based Secondary Rectifier in EV On-Board Charger

SiC MOSFET has superior switching performance over Si IGBT in terms of power loss and temperature characteristics In order to significantly improve the efficiency and power density of medium voltage drive and high-power converters, this paper proposes a current source gate driver for series connected SiC MOSFETs, forming a universal block of series connected SiC devices with higher voltage rating Proposed current source gate driver has better gate voltage synchronization performance because of its constant gate current and novel gate driver structure By implementing synchronized gate voltages, the snubber circuit is designed only for power loop difference, gate displacement current difference, and the snubber can be minimized or even be eliminated The proposed block has been verified by LTSPICE simulations and multi-pulse test experiments under 200kHz, 2kV, 0~60A condition using three 12kV/60A C2M0040120D SiC MOSFETs connected in series

A Universal Block of Series Connected SiC MOSFETs Using Current Source Gate Driver

Considering crosstalk suppression, the excellent characteristics of SiC MOSFET that high switching speed and low switching losses in half-bridge applications are not sufficiently utilized due to improper driving parameters. The passive suppression strategy simply and effectively suppress crosstalk by paralleling a small capacitor between the gate and source. Although the approach does alleviate crosstalk to a certain extent, it does slow down the switching speed and increase the switching losses in essence, so it is necessary to design driving parameters reasonably. This paper provides a trade-off parameters design method for driving resistor and the parallel capacitor to cater for high-speed and high-frequency applications, while taking driving circuit analysis and chips driving capability into account. Meanwhile, complicated calculations and a large number of experiments are avoided to obtain appropriate parameter values. What’s more, the rationality and effectiveness of parameters design are verified by experiments.

Chunhui Liu

Papers

High-Efficiency High-Power-Density CLLC Resonant Converter With Low-Stray-Capacitance and Well-Heat-Dissipated Planar Transformer for EV On-Board Charger

Smart Self-Driving Multilevel Gate Driver for Fast Switching and Crosstalk Suppression of SiC MOSFETs

High-dv/dt-Immune Fine-Controlled Parameter-Adaptive Synchronous Gate Driving for GaN-Based Secondary Rectifier in EV On-Board Charger

A Universal Block of Series Connected SiC MOSFETs Using Current Source Gate Driver

Design of Drive Parameters Considering Crosstalk Suppression for SiC MOSFET Applications