Colin G. Lyden

TL;DR: In this article, the authors present an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component.

TL;DR: This paper presents a precision 18-bit 12.5 MS/s ADC that was designed primarily for digital X-ray imaging systems and intended to have a faster output data rate than the precision successive approximation ADCs normally chosen for these systems but with similar DC accuracy and dynamic range.

TL;DR: An 18 bit 5 MS/s SAR ADC that has currently the lowest noise floor of any monolithic Nyquist converter relative to the full scale input and is achieved with an ADC core power of 30.52 mW giving a Schreier figure of merit of 179.3 dB.

TL;DR: Several circuit-level techniques are described which are used to reduce thermal noise and break the so-called kT/C limit, andMeasurements from two test chips are presented which demonstrate sampled thermal noise power reduction of up to 70% when compared to conventional kT-limited sampling.

TL;DR: In this paper, an analog to digital converter is provided comprising an array of capacitors for sampling an input, each capacitor having at least one associated switch for controllably connecting a terminal of the capacitor to a first reference voltage or to a second reference voltage; and a sequence generator for generating a sequence of bits.