Preface Introduction Conventional Coplanar Waveguide Conductor-Backed Coplanar Waveguide Coplanar Waveguide with Finite-Width Ground Planes Coplanar Waveguide Suspended Inside A Conducting Enclosure Coplanar Striplines Microshield Lines and Coupled Coplanar Waveguide Attenuation Characteristics of Conventional, Micromachined, and Superconducting Coplanar Waveguides Coplanar Waveguide Discontinuities and Circuit Elements Coplanar Waveguide Transitions Directional Couplers, Hybrids, and Magic-Ts Coplanar Waveguide Applications References Index

Coplanar waveguide circuits, components, and systems

Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

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High Efficiency RF and Microwave Solid State Power Amplifiers

Recent studies showed that conventional approaches being used to solve problems imposed by hard-wired metal interconnects will eventually encounter fundamental limits and may impede the advance of future ultralarge-scale integrated circuits (ULSls). To surpass these fundamental limits, we introduce a novel RF/wireless interconnect concept for future inter- and intra-ULSI communications. Unlike the traditional "passive" metal interconnect, the "active" RF/wireless interconnect is based on low loss and dispersion-free microwave signal transmission, near-field capacitive coupling, and modem multiple-access algorithms. In this paper we address issues relevant to the signal channeling of the RF/wireless interconnect and discuss its advantages in speed, signal integrity, and channel reconfiguration. The electronic overhead required in the RF/wireless-interconnect system and its compatibility with the future ULSI and MCM (multi-chip-module) will be discussed as well.

RF/wireless interconnect for inter- and intra-chip communications

A low-noise amplifier, direct-conversion quadrature mixer, power amplifier, and voltage-controlled oscillators have been implemented in a 012-/spl mu/m, 200-GHz f/sub T/290-GHz f/sub MAX/ SiGe bipolar technology for operation at 60 GHz At 615 GHz, the two-stage LNA achieves 45-dB NF, 15-dB gain, consuming 6 mA from 18 V This is the first known demonstration of a silicon LNA at V-band The downconverter consists of a preamplifier, I/Q double-balanced mixers, a frequency tripler, and a quadrature generator, and is again the first known demonstration of silicon active mixers at V-band At 60 GHz, the downconverter gain is 186 dB and the NF is 133 dB, and the circuit consumes 55 mA from 27 V, while the output buffers consume an additional 52 mA The balanced class-AB PA provides 108-dB gain, +112-dBm 1-dB compression point, 43% maximum PAE, and 16-dBm saturated output power Finally, fully differential Colpitts VCOs have been implemented at 22 and 67 GHz The 67-GHz VCO has a phase noise better than -98 dBc/Hz at 1-MHz offset, and provides a 31% tuning range for 8-mA current consumption from a 3-V supply

SiGe bipolar transceiver circuits operating at 60 GHz

New and emerging terahertz technology applications make this a very exciting time for the scientists, engineers, and technologists in the field. New sensors and detectors have been the primary driving force behind the unprecedented progress in terahertz technology, but in the last decade extraordinary developments in terahertz sources have also occurred. Driven primarily by space based missions for Earth, planetary, and astrophysical science, frequency multiplied sources have dominated the field in recent years, at least in the 2-3 THz frequency range. More recently, over the past few years terahertz quantum cascade lasers (QCLs) have made tremendous strides, finding increasing applications in terahertz systems. Vacuum electronic devices and photonic sources are not far behind either. In this article, the various technologies for terahertz sources are reviewed, and future trends are discussed.

Technology, Capabilities, and Performance of Low Power Terahertz Sources

High-performance W-band monolithic one- and two-stage low noise amplifiers (LNAs) based on pseudomorphic InGaAs-GaAs HEMT devices have been developed. The one-stage amplifier has a measured noise figure of 5.1 dB with an associated gain of 7 dB from 92 to 95 GHz, and the two-stage amplifier has a measured small signal gain of 13.3 dB at 94 GHz and 17 dB at 89 GHz with a noise figure of 5.5 dB from 91 to 95 GHz. An eight-stage LNA built by cascading four of these monolithic two-stage LNA chips demonstrates 49 dB gain and 6.5 dB noise figure at 94 GHz. A rigorous analysis procedure was incorporated in the design, including accurate active device modeling and full-wave EM analysis of passive structures. The first pass success of these LNA chip designs indicates the importance of a rigorous design/analysis methodology in millimeter-wave monolithic IC development. >

High-performance in W-band monolithic pseudomorphic InGaAs HEMT LNA's and design/analysis methodology

We have established a state-of-the-art InGaAs-InAlAs-InP HEMT MMIC fabrication process for millimeter-wave high-power applications. A two-stage monolithic microwave integrated circuit (MMIC) power amplifier with 0.15-/spl mu/m gate length and 1.28-mm output periphery fabricated using this process has demonstrated an output power of 427 mW with 19% power-added efficiency at 95 GHz. To our knowledge, this is the highest output power ever reported at this frequency for any solid-state MMIC amplifier.

A 95-GHz InP HEMT MMIC amplifier with 427-mW power output

The authors have fabricated 0.1- mu m T-gate pseudomorphic (PM) InGaAs power high-electron-mobility transistors (HEMTs) with record power and gain performance at 94 GHz. Devices with 40- mu m gate peripheries achieved 10.6-mW output power with 7.3-dB gain and 14.3% power-added efficiency (PAE). Devices with 160- mu m gate peripheries achieved 62.7-mW output power with 4.0-dB gain and 13.2% PAE. The authors believe the superior performance of these devices is due to the combination of a short 0.1- mu m T-gate, high-quality material, optimized device profile, and the reduction in source inductance due to source vias. >

High-gain W band pseudomorphic InGaAs power HEMTs

The author's present the DC and RF power performance of planar-doped channel InGaAs high-electron-mobility transistors (HEMTs). The planar-doped channel (PDC) pseudomorphic GaAs HEMT with 400 mu m of gate width exhibited an output power of 184 mW, corresponding to 460 mW/mm, with 4.6-dB saturation gain and 25% power-added efficiency at 55 GHz. Although higher power density is possible, the authors have designed the device to operate at less than 500 mW/mm for thermal and reliability reasons. Devices with unit gate finger widths ranging from 30 to 50 mu m were fabricated and characterized, with no performance degradation observed from using the longer gate fingers. >

High-power V-band pseudomorphic InGaAs HEMT

The authors have developed a modified MBE growth process to produce high-gain n-p-n GaAs-AlGaAs heterojunction bipolar transistors (HBTs) with a mean time to failure (MTTF) of 1.5*10/sup 8/ h at 125 degrees C. Beryllium incorporation and diffusion are controlled through a combination of reduced substrate temperature and increased As/Ga flux ratio during MBE growth, resulting in extremely stable HBT profiles. The authors also demonstrate graded InGaAs surface layers with nonalloyed refractory metal contacts that significantly improve ohmic reliability compared to alloyed AuGe contacts. The ability to produce robust HBTs by MBE is critically important to this technology. >

D.C. Streit

Papers

High-performance in W-band monolithic pseudomorphic InGaAs HEMT LNA's and design/analysis methodology

A 95-GHz InP HEMT MMIC amplifier with 427-mW power output

High-gain W band pseudomorphic InGaAs power HEMTs

High-power V-band pseudomorphic InGaAs HEMT

High-reliability GaAs-AlGaAs HBTs by MBE with Be base doping and InGaAs emitter contacts