Miniature power semiconductor devices mounted on printed circuit boards (PCBs) are normally cooled by means of PCB vias, copper pads, and/or heatsinks. Various reference PCB thermal designs have been provided by semiconductor manufacturers and researchers. However, the recommendations are not optimal, and there are some discrepancies among them, which may confuse electrical engineers. This paper aims to develop analytical thermal resistance models for PCB vias and pads, and further to obtain the optimal design for thermal resistance minimization. First, the PCB via array is thermally modeled in terms of multiple design parameters. A systematic parametric analysis leads to an optimal trajectory for the via diameter at different PCB specifications. Then, an axisymmetric thermal resistance model is developed for PCB thermal pads where the heat conduction, convection, and radiation all exist; due to the interdependence between the conductive/radiative heat transfer coefficients and the board temperatures, an algorithm is proposed to fast obtain the board-ambient thermal resistance and to predict the semiconductor junction temperature. Finally, the proposed thermal models and design optimization algorithms are verified by computational fluid dynamics simulations and experimental measurements.

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Thermal Modeling and Design Optimization of PCB Vias and Pads

High efficiency, high power density, and high reliability are always the technical trends of converters for renewable energy applications. Silicon carbide (SiC) devices can break through the technical limitations of silicon (Si) devices. Thus, SiC devices are considered as the foundations of next-generation high-performance converters. Aimed at the photovoltaic (PV) power system, this study surveys state-of-the-art of PV inverters. The future requirements of PV inverters on efficiency, power density, reliability, and cost are proposed. The possible benefits and available demonstrations of SiC-based PV inverters are presented. Then, some technical challenges of SiC PV inverters, including switching ringing, cross-talk, short-circuit withstand, gate driver, package, high-capacity module, and thermal interface material, are comprehensively illustrated through experimental results. Available researches on these challenges are overviewed, and some research trends on SiC-based PV inverter are presented. This paper is helpful for the research and development of next-generation SiC-based inverters for renewable energy integration.

Changes and challenges of photovoltaic inverter with silicon carbide device

Automotive on-board dc–dc converters are required to operate over a wide input and output voltage range depending on the state of charge of the input and the output battery. Conventionally, the unidirectional power transfer between these batteries is enabled by a two-stage converter concept. A first-stage nonisolated dc–dc converter regulates the input voltage of the galvanically isolated second-stage dc–dc converter such that the second-stage converter operates in its optimum operating point. This article presents a single-stage interleaved LLC resonant converter of 3.6 kW for this purpose. While LLC converters are usually not suitable to cover such a wide voltage range (the input voltage between 240 and 420 V and the output voltage between 8 and 16 V), this LLC converter is operated in a full-bridge mode for large gains and in a half-bridge mode for low gains. For intermediate gains and loads, the LLC employs the phase-shift mode. To operate the interleaved LLC s at equal switching frequencies enabling output current ripple cancellation to reduce the output capacitor, again, the phase-shift mode is utilized to balance the power transfer during the full-bridge mode while the asymmetrical duty-cycle mode is proposed for power balancing during the half-bridge mode. This article analyzes the converter design for these modes of operation and provides a comprehensive design procedure allowing the designer to simultaneously analyze all stress values for various resonant tank designs. A 3.6-kW prototype employing Si superjunction MOSFETs achieves a power density of 2.1 kW/L. The maximum efficiency reaches 96.5%, while for most operating points, it is kept well above 90%. The experimental measurement results validate the analysis and show that phase-shift operation and asymmetrical duty-cycle modulation can be utilized for power balancing for full-bridge and half-bridge configurations, respectively, such that a much smaller output capacitor can be employed.

Interleaved Single-Stage LLC Converter Design Utilizing Half- and Full-Bridge Configurations for Wide Voltage Transfer Ratio Applications

A new three dimensional package based on Printed Circuit Board (PCB) embedded die technology is presented in this paper. The package takes advantage of the Power Chip On Chip (PCOC) concept, where commutation cell is housed within the bus bar, allowing a very low inductance design for the package of up to 0.25 nH. Two key design challenges with the package relate to the layout and the thermal management. Thus, a parallelization technique enabling impedance balancing is developed for the layout and validated using four parallel Silicon Carbide (SiC) MOSFETs. Gate circuit is carefully designed allowing low inductive behavior and low electromagnetic coupling. Finally, the thermal management of the module is studied and die attach with direct copper filled vias is validated.

Silicon carbide power chip on chip module based on embedded die technology with paralleled dies

The CREE 1200V/50A, 25mΩ 6-Pack SiC MOSFET module (CCS050M12CM2) is decomposed into a full 3D CAD model, and materials identified, for use in electrical circuit and multi-physics simulations. A reverse engineering technique is first developed, outlined, and then demonstrated on the CREE module. The ANSYS Q3D Extractor is applied to the 3D CAD model where electrical, lumped parameter, parasitic circuit elements are determined. The model is also analyzed with a multi-physics simulator to provide in-situ thermal maps of the baseplate surface for application scenarios, e.g. with a thermal interface material and pin fin heat sink to capture the thermal spreading from junction to case. The complete model is made open source and freely distributed for use by the reader.

https://works.bepress.com/kang-peng/10/download/

Decomposition and electro-physical model creation of the CREE 1200V, 50A 3-Ph SiC module

One important challenge in power electronics design is removing the heat cost effectively from the power devices. A thermal via is a small diameter hole plated with copper and is used to transfer the heat from one side of the printed circuit board (PCB) to the other side. In this paper, a thorough literature review of the design and analysis of thermal vias in PCBs for thermal management of devices in power electronics converters are presented. Key advantages of using PCB's for thermal management are also presented. Based on the conclusions drawn from the available literature and practical manufacturing guidelines, four different via patterns for a single power device are selected and their thermal performances are studied. Each of the four via patterns is laid out multiple times on the same PCB. A power component in a D2PAK is soldered to each of the patterns. The PCB is attached to a liquid cooled cold plate. The devices are powered up and a thermal imaging camera is used to record the temperature of the device. The experimental results presented closely matches with the theoretical prediction and helps in identifying the most efficient thermal via pattern.

A review of thermal management in power converters with thermal vias

A daunting challenge in packaging design for power electronics products is removing the heat from the power devices in a cost effective manner In this paper, a thorough literature review of the design and analysis of thermal vias in PCBs for thermal management of power electronics devices are presented Based on the results from the available literature and practical manufacturing guidelines, four different via patterns for single power devices are selected Each of the four via patterns is laid out multiple times with their via holes are filled with a filler material and their performance are compared to non-filled thermal vias One dimensional analysis is performed to characterize the thermal performance of the thermal via patterns The experimental results presented closely matches the theoretical prediction to identify the most efficient thermal via pattern

A comparison of thermal vias patterns used for thermal management in power converter

One important challenge in power electronics design is removing the heat cost effectively from the power devices mounted on thermal vias on a printed circuited board (PCB). Thermal vias is a cluster of small diameter hole plated with copper and is used to transfer the heat from one side of the PCB where the power device is soldered to the other side which is generally mounted on a heat sink using a thermal interface material (TIM). To minimize the contact resistance and provide electrical insulation between the PCB and heat sink, TIMs are used to fill the air gaps and are an essential part of an assembly when solid surfaces are attached together. This paper presents a detailed comparison of the properties of various off-the-shelf available TIMs to be specifically used between PCB with thermal vias and heat sink. Experimental results are presented to determine the thermal performance of various TIMs.

Dale Wager

Papers

A review of thermal management in power converters with thermal vias

A comparison of thermal vias patterns used for thermal management in power converter

Performance comparison of thermal interface materials for power electronics applications