Showing papers by "David A. Johns published in 2016"
TL;DR: In this article, the authors proposed a power management architecture (PMA) for battery-powered portable applications, which is based on a novel hybrid converter topology that combines a fixed ratio MSC and a set of DB converters to achieve low volume and high power processing efficiency.
Abstract: This paper introduces a novel power management architecture (PMA) and its on-chip implementation, designed for battery-powered portable applications. Compared to the conventional two-stage PMA, consisting of a front-end inductive converter followed by a set of point-of-load buck converters, the presented PMA has drastically improved power density. The new architecture, named multioutput switched-capacitor convertor–differential-input buck (MSC–DB) convertor, is based on a novel hybrid converter topology that combines a fixed ratio MSC and a set of DB converters, to achieve low volume and high power processing efficiency. The front-end switched-capacitor stage has a higher power density than the conventionally used inductive converters. The downstream DB converters enable tight output voltage regulation, and allow for up to four times reduction of output filter inductors without the need for increasing switching frequency, hence limiting switching losses and improving the efficiency of the system. Furthermore, the new PMA is able to balance the state-of-charge of the input battery cells, a feature not existing in conventional systems. The PMA architecture is implemented both as a discrete prototype and as an application-specific integrated circuit (IC) module. The on-chip implemented architecture is fabricated in a standard 0.13-μm CMOS process and operates at 9.3-MHz switching frequency. Experimental comparisons with a conventional two-cell battery input architecture, providing 15 W of total power in three different voltage outputs, demonstrate up to two times reduction in the inductances of the downstream converter stages and more than two times reduction in losses, equivalent to the improvement of the power processing efficiency of a 12%. Moreover, the fabricated IC module is copackaged with low-profile thin-film inductors to demonstrate the effectiveness of the introduced architecture in reducing the volume of PMAs for portable applications.
37 citations
TL;DR: A simplified continuous-time model will be introduced so that accurate transfer functions and output noise can be obtained without the need for complicated charge-balance equations and thereby allow a better intuitive understanding of these structures.
Abstract: This brief demonstrates a method to realize complex conjugate poles using passive-switched-capacitor networks. In addition, a simplified continuous-time model will be introduced so that accurate transfer functions and output noise can be obtained without the need for complicated charge-balance equations and thereby allow a better intuitive understanding of these structures. The developed theory is demonstrated through the design of a second-order low-pass Butterworth biquad with applications intended in the design of wireless RF receivers.
8 citations