Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

We describe and analyse possible approaches to magnonic logic circuits and basic elements required for circuit construction. A distinctive feature of the magnonic circuitry is that information is transmitted by spin waves propagating in the magnetic waveguides without the use of electric current. The latter makes it possible to exploit spin wave phenomena for more efficient data transfer and enhanced logic functionality. We describe possible schemes for general computing and special task data processing. The functional throughput of the magnonic logic gates is estimated and compared with the conventional transistor-based approach. Magnonic logic circuits allow scaling down to the deep submicrometre range and THz frequency operation. The scaling is in favour of the magnonic circuits offering a significant functional advantage over the traditional approach. The disadvantages and problems of the spin wave devices are also discussed.

https://iopscience.iop.org/article/10.1088/0022-3727/43/26/264005/pdf

Magnonic logic circuits

Multiple logic devices are presently under study within the Nanoelectronic Research Initiative (NRI) to carry the development of integrated circuits beyond the complementary metal-oxide-semiconductor (CMOS) roadmap. Structure and operational principles of these devices are described. Theories used for benchmarking these devices are overviewed, and a general methodology is described for consistent estimates of the circuit area, switching time, and energy. The results of the comparison of the NRI logic devices using these benchmarks are presented.

Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking

A comparison of on-chip inductors with magnetic materials from previous studies is presented and examined. Results from on-chip inductors with magnetic material integrated into a 90 nm CMOS processes are presented. The inductors use copper metallization and amorphous Co-Zr-Ta magnetic material. Inductance densities of up to 1700 nH/mm2 were obtained thanks to inductance increases of up to 31 times, significantly greater than previously published on-chip inductors. With such improvements, the effects of eddy currents, skin effect, and proximity effect become clearly visible at higher frequencies. Co-Zr-Ta was chosen for its good combination of high permeability, good stability at high temperature (> 250degC), high saturation magnetization, low magnetostriction, high resistivity, minimal hysteretic loss, and compatibility with silicon technology. The Co-Zr-Ta alloy can operate at frequencies up to 9.8 GHz, but trade-offs exist between frequency, inductance, and quality factor. Our inductors with thick copper and thicker magnetic films have dc resistances as low as 0.04 Omega, and quality factors of up to 8 at frequencies as low as 40 MHz.

Review of On-Chip Inductor Structures With Magnetic Films

Sooner or later, fundamental limitations destine complementary metal-oxide-semiconductor (CMOS) scaling to a conclusion. A number of unique switches have been proposed as replacements, many of which do not even use electron charge as the state variable. Instead, these nanoscale structures pass tokens in the spin, excitonic, photonic, magnetic, quantum, or even heat domains. Emergent physical behaviors and idiosyncrasies of these novel switches can complement the execution of specific algorithms or workloads by enabling quite unique architectures. Ultimately, exploiting these unusual responses will extend throughput in high-performance computing. Alternative tokens also require new transport mechanisms to replace the conventional chip wire interconnect schemes of charge-based computing. New intrinsic limits to scaling in post-CMOS technologies are likely to be bounded ultimately by thermodynamic entropy and Shannon noise.

Device and Architecture Outlook for Beyond CMOS Switches

Integrated solenoid inductors with magnetic core were fabricated and analyzed. An inductance above 70 nH was achieved while keeping the coil resistance below 1 Omega and the device area below 1 mm2 using a solenoid design with a single magnetic layer. The inductance of the magnetic inductor was more than 30 times that of the air core inductor of the identical geometry, and the quality factor of the magnetic inductor was >5. Novel inductor designs and the scalability were also examined, and an inductance density higher than 200 nH/mm2 was obtained. The measured device properties and engineering tradeoffs were well explained by analytical models we developed.

Fabrication and Analysis of High-Performance Integrated Solenoid Inductor With Magnetic Core

Integrated solenoid inductors with magnetic core were designed and fabricated. An inductance above 70 nH was achieved while keeping the coil resistance below 1 Omega and the device area below 1 mm2. The inductance of the magnetic inductor was more than 30 times that of the air core inductor of the identical geometry, and the inductance density reached above 200 nH/mm2. Comparison with the planar spiral inductor shows that the solenoid inductor is significantly more efficient when the magnetic core is used. Our results indicate that integrated magnetic inductors suitable for mobile power conversion and RF system-on-chip circuits can be reliably designed and fabricated.

Design and fabrication of integrated solenoid inductors with magnetic cores

We describe a new approach to logic devices interconnection by the inductive coupling via a ferromagnetic film. The information among the distant devices is transmitted in a wireless manner via a magnetic field produced by spin waves propagating in the ferromagnetic film, referred to as the spin wave bus. As an alternative approach to the transistor-based architecture, logic circuits with spin wave bus do not use charge as an information carrier. A bit of information can be encoded into the phase or the amplitude of the spin wave signal. We present experimental data demonstrating inductive coupling through the 100 nm thick NiFe and CoFe films at room temperature. The performance of logic circuits with spin wave bus is illustrated by numerical modeling based on the experimental data. Potentially, logic circuits with spin wave bus may resolve the interconnect problem and provide "wireless" read-in and read-out. Another expected benefit is in the enhanced logic functionality. A set of "NOT," "AND," and "OR" logic gates can be realized in one device structure. The coupling between the circuits and the spin wave bus can be controlled. We present the results of numerical simulations showing the controllable switching of a bi-stable logic cell inductively coupled to the spin wave bus. The shortcomings and limitations of circuits with spin wave bus are also discussed.

Inductively Coupled Circuits with Spin Wave Bus for Information Processing

The effect of a closed magnetic core structure on an integrated inductor was investigated by winding two series connected inductors around a stretched hexagonal ring of CoTaZr. The 8.5 and 17.5 turn inductors were fabricated using standard silicon process, and simulations were performed using Ansoft HFSS software. The resulting inductance of the device showed no improvement over two inductors without the closed magnetic cores, indicating that the closed core structure was insufficient to enhance the mutual inductance between the two devices. This was attributed to the uniaxial anisotropy of the magnetic film, which prevented the film from routing the generated flux circularly around the core. Therefore, while the physical shape of the magnetic film was closed, the effective magnetic shape maintained an air gap.

Analysis of Integrated Solenoid Inductor With Closed Magnetic Core

We have designed and fabricated both single-coil and parallel-coil magnetic integrated inductors with extremely small resistances and high quality factors on an 8-in-round printed circuit board (PCB) substrate for microprocessor power delivery applications. The dc resistances of these inductors are less than 12 mOmega. Soft magnetic material CoFeHfO was successfully integrated into the inductor fabrication to increase the inductance. The quality factors are more than 80 in a frequency range of 1.5-2 GHz for air-core inductors and more than 23 in a range of 200-300 MHz for magnetic inductors. The net inductance improvement of the magnetic inductor over air-core inductor is about 12%, which could be further enhanced with a thicker magnetic core, according to our theoretic calculation and HFSS simulation. We also characterized the permeability spectra of CoFeHfO material on the PCB substrate, simulated the high-frequency performance of the magnetic integrated inductor by HFSS, and, for the first time, reached a good agreement with the experimental data. The experimental and simulation results of the magnetic inductors as compared to those of the air-core inductors point out the future direction to further optimize magnetic integrated inductors.

Dok Won Lee

Papers

Fabrication and Analysis of High-Performance Integrated Solenoid Inductor With Magnetic Core

Design and fabrication of integrated solenoid inductors with magnetic cores

Inductively Coupled Circuits with Spin Wave Bus for Information Processing

Analysis of Integrated Solenoid Inductor With Closed Magnetic Core

Small-Resistance and High-Quality-Factor Magnetic Integrated Inductors on PCB