D
Durbadal Mandal
Researcher at National Institute of Technology, Durgapur
Publications - 454
Citations - 4262
Durbadal Mandal is an academic researcher from National Institute of Technology, Durgapur. The author has contributed to research in topics: Particle swarm optimization & Antenna array. The author has an hindex of 27, co-authored 409 publications receiving 3297 citations. Previous affiliations of Durbadal Mandal include Hindustan College of Science and Technology.
Papers
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Proceedings ArticleDOI
IIR filter design and identification using NPSO technique
TL;DR: A modified version of swarm intelligence technique called Novel Particle Swarm Optimization (NPSO) technique is applied to IIR adaptive filter design problem and the simulation results justify the optimization superiority of the proposed NPSO over RGA, PSO and DE.
Proceedings ArticleDOI
A novel method for delay analysis of CMOS inverter with on-chip RLC interconnect load
TL;DR: In this article, the behavior of CMOS inverter driving RLC interconnect load is analyzed based on the modelling of RLC load, developed for submicron devices Sakurai's alpha-power law is used here for representing the transistor current.
Proceedings ArticleDOI
Digital stable IIR high pass filter optimization using PSO-CFIWA
TL;DR: From the simulation study it is established that the PSO-CFIWA outperforms RGA and PSO, not only in the accuracy of the designed filter but also in the convergence speed and solution quality i.e. the stop band attenuation, transition width, pass band and stop band ripples.
Journal ArticleDOI
Crosstalk Aware Bandwidth Modelling for VLSI RC Global Interconnects using 2-π Model
TL;DR: A closed-form bandwidth and delay expressions are derived based on the effective lumped element resistance and capacitance approximation of distributed RC lines using 2-π model.
Proceedings ArticleDOI
A novel 10T SRAM cell with low power dissipation in active and sleep mode for write operation
TL;DR: This paper focuses on the analysis of static and dynamic power dissipations and stability analysis of a proposed 10T SRAM cell that has been done in 45nm CMOS technology with 0.7 volt power supply in Microwind 3.1 software.