Microstructural design of hard coatings

Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen

A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.

High quality silicon oxide films by remote plasma cvd from disilane precursors

Methods of seasoning a remote plasma system are described. The methods include the steps of flowing a silicon-containing precursor into a remote plasma region to deposit a silicon containing film on an interior surface of the remote plasma system. The methods reduce reactions with the seasoned walls during deposition processes, resulting in improved deposition rate, improved deposition uniformity and reduced defectivity during subsequent deposition.

Remote plasma source seasoning

Substrate processing systems are described that have a capacitively coupled plasma (CCP) unit positioned inside a process chamber. The CCP unit may include a plasma excitation region formed between a first electrode and a second electrode. The first electrode may include a first plurality of openings to permit a first gas to enter the plasma excitation region, and the second electrode may include a second plurality of openings to permit an activated gas to exit the plasma excitation region. The system may further include a gas inlet for supplying the first gas to the first electrode of the CCP unit, and a pedestal that is operable to support a substrate. The pedestal is positioned below a gas reaction region into which the activated gas travels from the CCP unit.

Semiconductor processing system and methods using capacitively coupled plasma

The preparation and characterization of titanium boride films

A method of forming a nitrided silicon oxide layer. The method includes: forming a silicon dioxide layer on a surface of a silicon substrate; performing a rapid thermal nitridation of the silicon dioxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form an initial nitrided silicon oxide layer; and performing a rapid thermal oxidation or anneal of the initial nitrided silicon oxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form a nitrided silicon oxide layer. Also a method of forming a MOSFET with a nitrided silicon oxide dielectric layer.

Method of fabricating a nitrided silicon oxide gate dielectric layer

A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.

In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer

An apparatus for the in-situ detection of ions in a beam of an ion implanter device includes a mass spectrometer device having inner and outer walls and, a system for generating and directing an ion implant beam through the mass spectrometer device. The mass spectrometer device generates a magnetic field for directing ions of the ion implant beam of a desirable type through an aperture for implanting into a semiconductor wafer, and causing ions of undesirable type to collide with the inner or outer wall. For in-situ detection, a detector device is disposed on the inner and outer walls of the mass spectrometer for detecting the undesirable type of ions deflected. In one embodiment, the detector device comprises electronic sensor devices for detecting a concentration of the undesirable type ions which comprise undesirable elements and compounds. In another embodiment, the detector device comprises Faraday cup devices for detecting a concentration of ions of the undesirable type, or, may comprise a moving Faraday device positioned along tracks disposed respectively along the inner and outer wall, the Faraday being driven for reciprocal movement along a respective track. Data is collected from the sensors corresponding to the positions of undesirable ion detection and is processed, in real-time, during wafer processing. In this manner potential contaminants in the ion implant beam may be determined and corrective action may be taken in response.

Ion implanter in-situ mass spectrometer

Multi-layer SiN barrier film with high breakdown and low leakage is developed for Cu low k interconnects and is compared with the SiCNH barrier film used at previous technology nodes. Ultra-thin SiN barrier cap film also provides high conformality and fills recess in Cu lines observed post CMP. A significant enhancement in electro migration (EM) performance was obtained by selectively depositing Co on top of Cu lines followed by conformal multi-layer SiN barrier film. Further EM lifetime improvement is obtained by using a Co liner to form a wrap around structure with completely encapsulated Cu. An integrated in-situ preclean/ metal/dielectric cap chamber was used to avoid any oxidation of Cu/Co layers. Kinetic studies of CVD Co liner/Co cap samples show significant increase in EM activation energy (1.7 eV) over samples with dielectric only barrier film (0.9–1 eV). The complete wrap around structure with Co liner and Co cap shows improved device reliability.

E. Adams

Papers

The preparation and characterization of titanium boride films

Method of fabricating a nitrided silicon oxide gate dielectric layer

In-line electrical monitor for measuring mechanical stress at the device level on a semiconductor wafer

Ion implanter in-situ mass spectrometer

Advanced metal and dielectric barrier cap films for Cu low k interconnects