The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

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Metal oxide semiconductor thin-film transistors for flexible electronics

Author(s): Bonnassieux, Y; Brabec, CJ; Cao, Y; Carmichael, TB; Chabinyc, ML; Cheng, KT; Cho, G; Chung, A; Cobb, CL; Distler, A; Egelhaaf, HJ; Grau, G; Guo, X; Haghiashtiani, G; Huang, TC; Hussain, MM; Iniguez, B; Lee, TM; Li, L; Ma, Y; Ma, D; McAlpine, MC; Ng, TN; Osterbacka, R; Patel, SN; Peng, J; Peng, H; Rivnay, J; Shao, L; Steingart, D; Street, RA; Subramanian, V; Torsi, L; Wu, Y | Abstract: This roadmap includes the perspectives and visions of leading researchers in the key areas of flexible and printable electronics. The covered topics are broadly organized by the device technologies (sections 1–9), fabrication techniques (sections 10–12), and design and modeling approaches (sections 13 and 14) essential to the future development of new applications leveraging flexible electronics (FE). The interdisciplinary nature of this field involves everything from fundamental scientific discoveries to engineering challenges; from design and synthesis of new materials via novel device design to modelling and digital manufacturing of integrated systems. As such, this roadmap aims to serve as a resource on the current status and future challenges in the areas covered by the roadmap and to highlight the breadth and wide-ranging opportunities made available by FE technologies.

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The 2021 flexible and printed electronics roadmap

Flexible electronics are emerging as an alternative to conventional Si electronics for large-area low-cost applications such as smart sensors, disposable RFID tags, and solar cells. By utilizing inexpensive manufacturing methods such as ink-jet printing and roll-to-roll imprinting, flexible electronics can be made on low-cost plastic films just like printing newspapers. However, the key elements of flexible electronics, thin-film transistors TFTs, have slower operating speeds and are less reliable than their Si electronics counterparts. Furthermore, depending on the material property, TFTs are usually mono-type - either p- or n-type - devices. Making air-stable complementary TFT circuits is very challenging or not applicable to most TFT technologies. Existing design methodologies for Si electronics, therefore, cannot be directly applied to flexible electronics. Other inhibiting factors such as high supply voltage, large process variation, and lack of trustworthy device modeling also make designing larger-scale and robust TFT circuits a challenge.The objective of this article is to provide an in-depth overview of flexible electronics from their applications, manufacturing processes, device characteristics, to circuit and system design solutions. We first introduce the low-cost fabrication methods for flexible electronics, including ink-jet printing, screen printing, and gravure printing. The device characteristics and compact modeling of four major types of TFT technologies, including hydrogenated amorphous silicon a-Si:H TFT, polymer organic TFT, self-assembly monolayer SAM organic TFT, and metal oxide TFT, will be illustrated. We will then give an overview of digital and analog circuit design from basic logic gates to a microprocessor, as well as design automation tools and methods, for designing flexible electronics. In order to accurately predict the time-dependent degradation of TFT circuits, we describe a reliability simulation framework that can predict the TFT circuits' performance degradation under bias-stress. This framework has been validated using the amorphous-silicon a-Si TFT scan driver for TFT-LCD displays. Finally, we will give an overview of flexible thin-film photovoltaics using different materials including amorphous silicon, CdTe, CIGS , and organic solar cells.

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Design, Automation, and Test for Low-Power and Reliable Flexible Electronics

In advanced technology node, not only process variations but also aging effects have critical impacts on circuit performance. Most of existing works consider process variations and aging effects separately while building the corresponding behavior models. Because of the time-varied circuit property, parametric yield need to be reanalyzed in each aging time step. This results in expensive simulation cost for reliability analysis due to the huge number of circuit simulation runs. In this paper, an incremental Latin hypercube sampling (LHS) approach is proposed to build the stochastic behavior models for analog/mixed-signal (AMS) circuits while simultaneously considering process variations and aging effects. By reusing previous sampling information, only a few new samples are incrementally updated to build an accurate stochastic model in different time steps, which significantly reduces the number of simulations for aging analysis. Experiments on an operational amplifier and a DAC circuit achieve 242x speedup over traditional reliability analysis method with similar accuracies.

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Incremental Latin hypercube sampling for lifetime stochastic behavioral modeling of analog circuits

Mobility is the primary device parameter affecting circuit performance in flexible thin-film transistor (TFT) technologies, and is particularly sensitive to the change of mechanical strain and temperature. However, existing algorithms only consider the impact of mechanical strain in cell placement of flexible TFT circuits. Without taking temperature into consideration, mobility may be dramatically decreased which leads to circuit performance degradation. This article presents the first work to minimize the mobility variation caused by the change of both mechanical strain and temperature. Experimental results show that the proposed algorithms can effectively and efficiently reduce the increasing critical path delay.

Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration

This paper presents a SPICE-based simulator, FlexiAnalyzer, for flexible thin-film transistor (TFT) circuits. This simulator performs four types of analysis: yield analysis, aging analysis, performance analysis, and weak spot analysis. This simulator considers three important effects: 1) threshold voltage variation of manufacturing process; 2) threshold voltage shift due to aging effect; and 3) mobility change due to bending effect. Six different OLED pixel drivers designed in 8- μm amorphous silicon TFT technology were used in simulation results. The proposed tool provides a good solution for designers to evaluate the performance and yield of flexible TFT circuits.

Flexible TFT Circuit Analyzer Considering Process Variation, Aging, and Bending Effects

Mechanical strain significantly affects thin-film transistor (TFT) device mobility; thus, strain awareness is indispensable to flexible TFT circuit design. This article presents a strain-aware placement technique to enhance TFT logic circuit performance in the presence of mechanical stress.

Placement Optimization of Flexible TFT Digital Circuits

This paper presents a static timing analyzer for flexible TFT circuits (STAF). Gate delay models are first characterized by SPICE simulation as a function of load capacitance and mobility. A block-based STA algorithm is then applied to identify the longest path delay and shortest path delay change in different regions under bending. STAF plots maps that show "bending hot spots" which, when bended, significantly change the circuit timing. Experimental results on ISCAS'89 benchmark circuits show that the longest path delay can increase by up to 32% when a single region is bended. What is worse, the shortest path change can be up to 9%, which cannot be simply fixed by reduced clock speed. STAF provides important timing information for flexible TFT circuit designers.

Static timing analysis for flexible TFT circuits

Flexible thin-film transistor (TFT) technology has many advantages over conventional silicon technology such as low cost and short manufacturing time. As the technology advances, large-scale digital circuits can now be implemented using flexible TFT technology. However, transistor mobility changes significantly when TFT are bent, and thus the circuit timing is seriously degraded. A placement optimization of flexible TFT digital circuits is proposed to reduce the timing degradation due to bending effect. Three optimization modes are supported based on different package and bending assumption. So far as we know, this is the first design for flexibility EDA tool.

This paper compares very-low-voltage (VLV) testing and quiescent power supply current (IDDQ) testing for amorphous silicon thin-film transistor (a-Si TFT) NMOS digital circuits. As many as 140 circuits-under-test (CUT) of two different design styles are implemented in 8 μm a-Si TFT technology on the glass substrate. All CUT are tested both at nominal voltage (10 V) and very low voltage (7 V), followed by a 200-second voltage stress at 30 V. Seven unreliable CUT that escaped nominal voltage (NV) testing are successfully caught by VLV testing. The results indicate that VLV testing is more effective than IDDQ testing to screen out unreliable a-Si TFT circuits. This study suggests that VLV testing is a non-destructive and economic alternative to burn-in for a-Si TFT circuits.

En-Hua Ma

Papers

Flexible TFT Circuit Analyzer Considering Process Variation, Aging, and Bending Effects

Placement Optimization of Flexible TFT Digital Circuits

Static timing analysis for flexible TFT circuits

Placement Optimization of Flexible TFT Digital Circuits

Reliability Screening of a-Si TFT Circuits: Very-Low Voltage and ${\rm I}_{\rm DDQ}$ Testing