Numerical Methods for Scientists and Engineers

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Detection, Estimation, and Modulation Theory

Microsoft Kinect, a low-cost motion sensing device, enables users to interact with computers or game consoles naturally through gestures and spoken commands without any other peripheral equipment. As such, it has commanded intense interests in research and development on the Kinect technology. In this paper, we present, a comprehensive survey on Kinect applications, and the latest research and development on motion recognition using data captured by the Kinect sensor. On the applications front, we review the applications of the Kinect technology in a variety of areas, including healthcare, education and performing arts, robotics, sign language recognition, retail services, workplace safety training, as well as 3D reconstructions. On the technology front, we provide an overview of the main features of both versions of the Kinect sensor together with the depth sensing technologies used, and review literatures on human motion recognition techniques used in Kinect applications. We provide a classification of motion recognition techniques to highlight the different approaches used in human motion recognition. Furthermore, we compile a list of publicly available Kinect datasets. These datasets are valuable resources for researchers to investigate better methods for human motion recognition and lower-level computer vision tasks such as segmentation, object detection and human pose estimation.

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A Survey of Applications and Human Motion Recognition with Microsoft Kinect

IEEE transactions on very large scale integration (VLSI) systems

This paper presents a novel convolutional neural network (CNN) -based method for high-accuracy real-time car license plate detection. Many contemporary methods for car license plate detection are reasonably effective under the specific conditions or strong assumptions only. However, they exhibit poor performance when the assessed car license plate images have a degree of rotation, as a result of manual capture by traffic police or deviation of the camera. Therefore, we propose the a CNN-based MD-YOLO framework for multi-directional car license plate detection. Using accurate rotation angle prediction and a fast intersection-over-union evaluation strategy, our proposed method can elegantly manage rotational problems in real-time scenarios. A series of experiments have been carried out to establish that the proposed method outperforms over other existing state-of-the-art methods in terms of better accuracy and lower computational cost.

A New CNN-Based Method for Multi-Directional Car License Plate Detection

This paper introduces a new datapath architecture for reconfigurable processors. The proposed datapath is based on Network-on-Chip approach and facilitates tight coupling of all functional units. Reconfigurable functional elements can be dynamically allocated for application specific optimizations, enabling polymorphic computing. Using a modified network simulator, performance of several NoC topologies and parameters are investigated with standard benchmark programs, including fine grain and coarse grain computations. Simulation results highlight the flexibility and scalability of the proposed polymorphic NoC processor for a wide range of application domains.

/pdf/a-reconfigurable-network-on-chip-datapath-for-application-212inhx93a.pdf

A Reconfigurable Network-on-Chip Datapath for Application Specific Computing

Research on Deep Learning algorithms has progressed rapidly in recent years. Since the inception of deep learning, numerous architectures have been proposed for various applications targeting pattern recognition, image, audio and information analysis. For example, often audio signal classifications use variations of Deep Belief Networks (DBN), while a Deep Neural Network (DNN) called AlexNet is widely used for handwriting and alphabet recognition. Convolutional Neural Network (CNN) and its derivatives are primarily used in machine vision and imaging applications. Convolutional Deep Belief Networks (CDBN) work as a combination of CNN and DBN architectures and can be applied to image, audio and multimodal data. There has been limited studies on the effectiveness of these architectures for ultrasonic NDE applications. Therefore, this work investigates new flaw detection methods based on recent advances on deep learning architectures.

Performance analysis of deep learning architectures for ultrasonic NDE applications

Multiplierless architectures for frequency-diverse target detection algorithms.

Availability of complex programmable logic units such as Field Programmable Gate Arrays (FPGAs), advanced CAD tools for hardware/software partitioning and streamlined integration of sensor arrays with System-on-Chip (SoC) components provide a remarkable potential for a new generation of embedded systems which are adaptable, fast, compact, low power and easy to develop. In particular, architectures based on multi-core processing engines can offer the computational power and flexibility to applications in diverse fields such as machine vision, image analysis, and data compression. Consequently, in this research, we aim to address the increased computational demands of real-time sensor array applications by developing efficient algorithms and parallel architectures for hardware synthesis. A significant contribution of this work is the development of a common framework which is based on hardware accelerators and software processor(s) synthesized within a single SoC. This framework establishes reusable components in sensor applications such as video processing and dramatically reduces the development time. 
First, we analyze the compression of ultrasonic data using the wavelet transform. Designing universal embedded hardware architecture for Discrete Wavelet Transform (DWT) is a challenging problem due to the diversity among wavelet kernel filters. We present three different hardware architectures for implementing multiple wavelet kernels. We analyze efficient volumetric ultrasonic data compression algorithms which require fewer computations and can be implemented with fewer hardware resources. DWT is used for compression of 3D ultrasonic data. Different wavelet kernels are analyzed and benchmarked for compression of experimental signals. In order to reduce computational complexity, non-uniform DWT method is utilized where different wavelet filters are applied to ultrasonic axial resolution and spatial resolutions. 
FPGA-based design and implementation of a high-performance image and video processing platform is presented. A hardware/software codesign system is proposed to realize complex algorithms for real-time image and video processing applications. 
Finally, we present the implementation of HTTP and FTP servers on FPGAs. This allows the control over internet of any proposed processing platform. Any data can be retrieved and stored on a host computer instead of using the limited amount of resources available on the FPGA.

Multicore processing engines for machine vision, image analysis and data compression

In this paper, data-driven dynamic logic and its' variant split-path data-driven dynamic logic circuits are analyzed for dynamic and static power consumption. A new low-power methodology is introduced in order to reduce the leakage current while maintaining the speed advantages of the data driven dynamic logic. A sleep switch transistor is used in the data driven dynamic circuits in order to force a sleep mode asynchronously. An additional power gating transistor is used to avoid the possible short-circuit paths during idle mode. The proposed circuits are compared against the conventional dynamic logic that uses dual-Vt sleep switch transistors for reduced leakage. 45nm technology has been used to implement the designs and they have been tested using ripple carry adders. The results demonstrate that, with the proposed circuits, leakage power can be reduced by more than 90%, with minimal impact on the speed and dynamic power consumption. Split-path data-driven dynamic logic offers the best speed and power-delay product among the dynamic logic circuits.

Erdal Oruklu

Papers

A Reconfigurable Network-on-Chip Datapath for Application Specific Computing

Performance analysis of deep learning architectures for ultrasonic NDE applications

Multiplierless architectures for frequency-diverse target detection algorithms.

Multicore processing engines for machine vision, image analysis and data compression

Leakage power reduction in data driven dynamic logic circuits