Power semiconductor devices based on silicon (Si) are quickly approaching their limits, set by fundamental material properties. In order to address these limitations, new materials for use in devices must be investigated. Wide bandgap materials, such as silicon carbide (SiC) and gallium nitride (GaN) have suitable properties for power electronic applications; however, fabrication of practical devices from these materials may be challenging. SiC technology has matured to point of commercialized devices, whereas GaN requires further research to realize full material potential. This review covers fundamental material properties of GaN as they relate to Si and SiC. This is followed by a discussion of the contemporary issues involved with bulk GaN substrates and their fabrication and a brief overview of how devices are fabricated, both on native GaN substrate material and non-native substrate material. An overview of current device structures, which are being analyzed for use in power switching applications, is then provided; both vertical and lateral device structures are considered. Finally, a brief discussion of prototypes currently employing GaN devices is given.

GaN Technology for Power Electronic Applications: A Review

Emerging trends in wide band gap semiconductors (SiC and GaN) technology for power devices

The systematic characterization of a 650-V/13-A enhancement-mode GaN power transistor with p-GaN gate is presented. Critical device parameters such as ON-resistance $R_{{\rm{ON}}}$ and threshold voltage $V_{{\rm{TH}}}$ are evaluated under both static and dynamic (i.e., switching) operating conditions. The dynamic R ON is found to exhibit different dependence on the gate drive voltage $V_{{\rm{GS}}}$ from the static $R_{{\rm{ON}}}$ . While reasonably suppressed at higher $V_{{\rm{GS}}}$ of 5 and 6 V, the degradation in dynamic R ON is significantly larger at lower $V_{{\rm{GS}}}$ of 3–4 V, which is attributed to the positive shift in $V_{{\rm{TH}}}$ under switching operations. In addition to characterization of discrete devices, a custom-designed double-pulse test circuit with 400-V, 10-A test capability is built to evaluate the transient switching performance of the p-GaN gate power transistors. Optimal gate drive conditions are proposed to: 1) provide sufficient gate over-drive to minimize the impact of the $V_{{\rm{TH}}}$ shift on the dynamic $R_{{\rm{ON}}}$ ; and 2) leave enough headroom to save the device from excessive gate stresses. Moreover, gate drive circuit design and board layout considerations are also discussed by taking into account the fast switching characteristics of GaN devices.

Maximizing the Performance of 650-V p-GaN Gate HEMTs: Dynamic RON Characterization and Circuit Design Considerations

We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

In this letter, we studied the forward bias gate breakdown mechanism on enhancement-mode p-GaN gate AlGaN/GaN high-electron mobility transistors To the best of our knowledge, it is the first time that the temperature dependence of the forward gate breakdown has been characterized We report for the first time on the observation of a positive temperature dependence, ie, a higher temperature leads to a higher gate breakdown voltage Such unexpected behavior is explained by avalanche breakdown mechanism: at a high positive gate bias, electron/hole pairs are generated in the depletion region at the Schottky metal/p-GaN junction Furthermore, at a high gate bias but before the catastrophic gate breakdown, a light emission was detected by a emission microscopy measurement This effect indicates an avalanche luminescence, which is mainly due to the recombination of the generated electron/hole pairs

Forward Bias Gate Breakdown Mechanism in Enhancement-Mode p-GaN Gate AlGaN/GaN High-Electron Mobility Transistors

For conventional GaN-based high electron mobility transistors (HEMTs), the work function of gate metal is critical to electrical parameters, such as OFF-state leakage current, forward operating current, and threshold voltage. A high work function is thus required to maintain Schottky gate contact. In this letter, an enhancement-mode HEMT composed of p-type GaN/AlGaN/GaN was fabricated. Unlike typical HEMTs that the Schottky barrier height is determined by the energy difference between gate metal work function and semiconductor (AlGaN, or GaN) conduction band, the insertion of the p-GaN relieves the constraint of gate metal. In addition, the gate Schottky barrier now correlates to the valence band of the semiconductor. Here we compare the HEMT performance of different gate metals-Ni/Au, Ti/Au, and Mo/Ti/Au. The results reveal that a tradeoff between V
 TH
 and output drain current.

Impact of Gate Metal on the Performance of p-GaN/AlGaN/GaN High Electron Mobility Transistors

An enhancement-mode (E-mode) high-electron mobility transistor (HEMT) was demonstrated by inserting a p-type GaN layer underneath the gate electrode. The effects of process flows and device structures on the electrical properties are investigated in this paper. We demonstrated a threshold voltage (Vth) of 4.3 V by adjusting the built-in voltage of the diode formed between the p-GaN and channel by the alloy temperature. Next, we found the existence of parallel conduction paths of the p-GaN layer and 2-D electron gas (2DEG) channel in such a HEMT structure. By removing p-GaN above the gate-source and gate-drain regions, current conduction migrates from p-GaN to 2DEG channel. The process window of the p-GaN residual thickness to ensure a steady forward current-voltage operation was estimated to be 10±5 nm in our case. Finally, with the p-GaN underneath the gate contact to deplete surface leakage current, an E-mode HEMT with a breakdown voltage (VBD) of 1630 V is achieved.

Enhancement-Mode GaN-Based High-Electron Mobility Transistors on the Si Substrate With a P-Type GaN Cap Layer

We demonstrate a novel design of large-size device in AlGaN/GaN high-electron-mobility transistor (HEMT). Depletion mode (D-mode) HEMTs and enhancement mode (E-mode) HEMTs are fabricated in our research. The saturation current of D-mode HEMTs is over 6A. By using Cascode structure, the D-mode HEMT becomes a normally-off device efficiently, and the threshold voltage of it rises from-7V to 2V. By using BCB (Benzocyclobutene) as the passivation, the E-mode HEMT shows an excellent characteristic. Also, when the VGS of the E-mode HEMT is over 9V, it still shows a good performance.

Finella Lee

Papers

Impact of Gate Metal on the Performance of p-GaN/AlGaN/GaN High Electron Mobility Transistors

Enhancement-Mode GaN-Based High-Electron Mobility Transistors on the Si Substrate With a P-Type GaN Cap Layer

Applications of GaN-Based High Electron Mobility Transistors in Large-Size Devices