F
Frank O. Distler
Researcher at IBM
Publications - 6
Citations - 615
Frank O. Distler is an academic researcher from IBM. The author has contributed to research in topics: Automatic test equipment & Automatic test pattern generation. The author has an hindex of 6, co-authored 6 publications receiving 599 citations.
Papers
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Proceedings ArticleDOI
OPMISR: the foundation for compressed ATPG vectors
Carl F. Barnhart,V. Brunkhorst,Frank O. Distler,O. Farnsworth,Brion L. Keller,Bernd Karl Ferdinand Koenemann +5 more
TL;DR: Techniques are presented in this paper that allow for substantial compression of Automatic Test Pattern Generation (ATPG) produced test vectors, allowing for a more than 10-fold reduction in tester scan buffer data volume on ATPG compacted tests.
Journal ArticleDOI
Extending OPMISR beyond 10/spl times/ scan test efficiency
Carl F. Barnhart,V. Brunkhorst,Frank O. Distler,O. Farnsworth,A. Ferko,Brion L. Keller,D. Scott,Bernd Karl Ferdinand Koenemann,T. Onodera +8 more
TL;DR: New on-product multiple-input signature register (OPMISR) techniques compress test vectors produced by ATPG, substantially reducing data volume and test time.
Patent
System for reducing test data volume in the testing of logic products
TL;DR: In this article, the authors proposed a method for reducing test data volume in the testing of logic products such as modules on integrated circuit chips, and systems comprised of multiple integrated circuits chips.
Patent
Automation of fuse compression for an asic design system
TL;DR: In this article, a method and system for repairing defective memory in a semiconductor chip is presented, where the defective sections are replaceable by sections of the redundant memory, and the ordered fuses have an associated bit pattern of bits which sequentially represent the defective parts in the compressed format.
Patent
Method for optimizing a set of scan diagnostic patterns
TL;DR: In this paper, a method and system for generating a set of scan diagnostic patterns for diagnosing fails in scan chains is presented, which includes selecting a number of latches, selecting a pattern from the set of test patterns, determining the number of lateral insertions of the selected pattern, and determining a new insertion count to add to the selected patterns.