There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

DC and AC Microgrids are key elements to integrate renewable and distributed energy resources as well as distributed energy storage systems. In the last years, efforts toward the standardization of these Microgrids have been made. In this sense, this paper present the hierarchical control derived from ISA-95 and electrical dispatching standards to endow smartness and flexibility to microgrids. The hierarchical control proposed consist of three levels: i) the primary control is based on the droop method, including an output impedance virtual loop; ii) the secondary control allows restoring the deviations produced by the primary control; and iii) the tertiary control manage the power flow between the microgrid and the external electrical distribution system. Results from a hierarchical-controlled microgrid are provided to show the feasibility of the proposed approach.

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Hierarchical control of droop-controlled DC and AC microgrids — a general approach towards standardization

This paper reviews the current status and implementation of battery chargers, charging power levels, and infrastructure for plug-in electric vehicles and hybrids. Charger systems are categorized into off-board and on-board types with unidirectional or bidirectional power flow. Unidirectional charging limits hardware requirements and simplifies interconnection issues. Bidirectional charging supports battery energy injection back to the grid. Typical on-board chargers restrict power because of weight, space, and cost constraints. They can be integrated with the electric drive to avoid these problems. The availability of charging infrastructure reduces on-board energy storage requirements and costs. On-board charger systems can be conductive or inductive. An off-board charger can be designed for high charging rates and is less constrained by size and weight. Level 1 (convenience), Level 2 (primary), and Level 3 (fast) power levels are discussed. Future aspects such as roadbed charging are presented. Various power level chargers and infrastructure configurations are presented, compared, and evaluated based on amount of power, charging time and location, cost, equipment, and other factors.

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Review of Battery Charger Topologies, Charging Power Levels, and Infrastructure for Plug-In Electric and Hybrid Vehicles

Introduction to linear and nonlinear programming

The matrix converter is an array of controlled semiconductor switches that connects directly the three-phase source to the three-phase load. This converter has several attractive features that have been investigated in the last two decades. In the last few years, an increase in research work has been observed, bringing this topology closer to the industrial application. This paper presents the state-of-the-art view in the development of this converter, starting with a brief historical review. An important part of the paper is dedicated to a discussion of the most important modulation and control strategies developed recently. Special attention is given to present modern methods developed to solve the commutation problem. Some new arrays of power bidirectional switches integrated in a single module are also presented. Finally, this paper includes some practical issues related to the practical application of this technology, like overvoltage protection, use of filters and ride-through capability.

Matrix converters: a technology review

Gallium nitride high electron mobility transistor (GaN HEMT) has matured dramatically over the last few years. A progressively larger number of GaN devices have been manufactured for in field applications ranging from low power voltage regulators to high power infrastructure base-stations. Compared to the state-of-the-art silicon MOSFET, GaN HEMT has a much better figure of merit and shows potential for high-frequency applications. The first generation of 600 V GaN HEMT is intrinsically normally on device. To easily apply normally on GaN HEMT in circuit design, a low-voltage silicon MOSFET is in series to drive the GaN HEMT, which is well known as cascode structure. This paper studies the characteristics and operation principles of a 600 V cascode GaN HEMT. Evaluations of the cascode GaN HEMT performance based on buck converter at hard-switching and soft-switching conditions are presented in detail. Experimental results prove that the cascode GaN HEMT is superior to the silicon MOSFET, but it still needs soft-switching in high-frequency operation due to considerable package and layout parasitic inductors and capacitors. The cascode GaN HEMT is then applied to a 1 MHz 300 W 400 V/12 V LLC converter. A comparison of experimental results with a state-of-the-art silicon MOSFET is provided to validate the advantages of the GaN HEMT.

Evaluation and Application of 600 V GaN HEMT in Cascode Structure

The narrow duty cycle in the buck converter limits its application for high-step-down dc-dc conversion. With a simple structure, the tapped-inductor buck converter shows promise for extending the duty cycle. However, the leakage inductance causes a huge turn-off voltage spike across the top switch. Also, the gate drive for the top switch is not simple due to its floating source connection. This paper solves all these problems by modifying the tapped-inductor structure. A simple lossless clamp circuit can effectively clamp the switch turn-off voltage spike and totally recover the leakage energy. Experimental results for 12V-to-1.5V and 48V-to-6V dc-dc conversions show significant improvements in efficiency.

Tapped-inductor buck converter for high-step-down DC-DC conversion

Two filters with identical topologies and components can exhibit a significant difference in filter effectiveness when the layouts are different The goal of this paper is to examine the effects of parasitic couplings among the filter components and the coupling between the filter components and the ground plane of printed circuit board (PCB) Specifically, six different coupling effects are investigated: the couplings between the inductor and capacitors, a filter inductor and trace loops, two filter inductors, two capacitor parasitic inductances, a filter inductor and ground plane, and two trace loops Experiments were performed, theories were developed to investigate and characterize these parasitic couplings

Effects of parasitic parameters on EMI filter performance

In many single-phase power factor correction (PFC) applications, the power level can reach several kilowatts; and in some situations, the input voltage can be quite high too. For high power and/or high voltage applications, the major concerns of the conventional boost PFC converter are the inductor volume and weight, and losses on the power devices, which will affect converter cost, efficiency, and power density. In this paper, a three-level boost converter is adopted for single-phase PFC, which uses a much smaller inductor and lower voltage devices than the conventional boost PFC converter does, yielding high power density, high efficiency, and low cost. >

Single-phase three-level boost power factor correction converter

Future generations of microprocessors are expected to exhibit much heavier loads and much faster transient slew rates. Today's voltage regulator module (VRM) will need a large amount of extra decoupling and output filter capacitors to meet future requirements, which will basically make the existing VRM topologies impractical. As a candidate topology, the interleaved quasisquare-wave (QSW) VRM exhibits very good performance, such as a fast transient response and a very high power density. The difficulty with the application of the interleaved parallel technology is the current-sharing control. In this paper, a novel current-sensing and current-sharing technique is proposed. With this technique, current sharing can be controlled simply in parallel converters without a current transformer and current-sensing resistors. In addition, this technique can be easily integrated with an IC chip. The four-module paralleled QSW VRM is used to evaluate this technique. Experimental results verify that with this technique, the VRM has a high power density, high efficiency and a fast transient response. The concept of the current sharing technique is also generalized and extended.

Fred C. Lee

Papers

Evaluation and Application of 600 V GaN HEMT in Cascode Structure

Tapped-inductor buck converter for high-step-down DC-DC conversion

Effects of parasitic parameters on EMI filter performance

Single-phase three-level boost power factor correction converter

A novel current-sharing control technique for low-voltage high-current voltage regulator module applications