Threshold voltage ( V TH) shift due to bias temperature instability (BTI) is a well-known problem in SiC mosfet s that occurs due to oxide traps in the SiC/SiO2 gate interface. The reduced band offsets and increased interface/fixed oxide traps in SiC mosfet s makes this a more critical problem compared to silicon. Before qualification, power devices are subjected to gate bias stress tests after which V TH shift is monitored. However, some recovery occurs between the end of the stress and V TH characterization, thereby potentially underestimating the extent of the problem. In applications where the SiC mosfet module is turned off with a negative bias at high temperature, if the V TH shift is severe enough, there may be electrothermal failure due to current crowding since parallel devices lose synchronization during turn- on . In this paper, a novel method that uses the forward voltage of the body diode during reverse conduction of a small sensing current is introduced as a technique for monitoring V TH shift and recovery due to BTI. This non-invasive method exploits the increased body effect that is peculiar to SiC mosfet s due to the higher body diode forward voltage. With the proposed method, it is possible to non-invasively assess V TH shift dynamically during BTI characterization tests.

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A Novel Non-Intrusive Technique for BTI Characterization in SiC mosfet s

This article focuses on failure modes and lifetime testing of IGBT modules being one of the most vulnerable components in power electronic converters. IGBT modules have already located themselves in the heart of many critical applications, such as automotive, aerospace, transportation, and energy. They are required to work under harsh operational and environmental conditions for extended target lifetime that may reach 30 to 40 years in some applications. Therefore, addressing the reliability of IGBT modules is of paramount importance. The paper provides a comprehensive review on IGBT modules dominant failure modes, and long-term reliability. A detailed discussion on accelerated testing, and lifetime and degradation characterization considering thermo-mechanical stress is also presented in details.

A Review on IGBT Module Failure Modes and Lifetime Testing

Applications under extreme conditions, such as solid circuit breakers and electromagnetic launching systems, are great challenges to semiconductor power devices. The die-attach solder joint is as one of the most vulnerable structures and critical to the reliability of insulated-gate bipolar transistor (IGBT) modules. In this paper, IGBT modules were cross sectioned and tested under pulse high-current power cycling. The failure mechanism of the die-attach solder in IGBTs at pulse high-current modes was investigated. Evolution of microdefects in the die-attach solder during power cycling was characterized and factors for the failure of die-attach solder joints was discussed. The results revealed that voids, cracks, and detachment of interface were the major microdefects in the die-attach solder layer. A detachment of the Si/Sn–Ag–Cu (SAC) interface is verified as the major failure mode under pulse high-current power cycling. Interface cracks between the Si-chip and die-attach solder layer were found to initiate first at the solder layer edges and then extended to the center of the solder layer with the increase of power cycles. The detachment of Si/SAC interface was more similar to the brittle fracture. The junction temperature swing and heating rate were the key factors for detachment of the Si/SAC interface.

Failure Mechanism of Die-Attach Solder Joints in IGBT Modules Under Pulse High-Current Power Cycling

In this paper, performance degradations of enhancement mode (E-mode) gallium nitride (GaN) high-electronmobility-transistors (HEMTs) under accelerated power cycling tests are presented. For this purpose, a DC power cycling setup is designed to accelerate the aging process in a realistic manner. In order to evaluate the aging-related parameter shifts and corresponding precursors, electrical parameters are periodically monitored through a high-end curve tracer. Both the cascode device and p-GaN gate GaN devices are evaluated during these tests. In the experimental results, it is observed that the onstate resistance gradually increases in both devices. Meanwhile, the threshold voltage of the p-GaN gate GaN device gradually increases over the aging cycles and a remarkable variation in the transfer characteristics is observed. At the end of the tests, failure analyses are conducted on both devices. The cascode GaN devices show both short and open circuit failure modes, and a weak point in the drain-side bond wires is detected. For the p-GaN gate GaN device, the electrical parameter shifts indicate a possible gate degradation after the device is aged.

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Performance Degradation of GaN HEMTs Under Accelerated Power Cycling Tests

With the aim to increase the competitiveness of solar energy, the high reliability of photovoltaic (PV) inverters is demanded. In PV applications, the inverter reliability and lifetime are strongly affected by the operating condition that is referred to as the mission profile (i.e., solar irradiance and ambient temperature). Since the mission profile of PV systems is location-dependent, the inverter reliability performance and lifetime can vary considerably in practice, that is, from the reliability perspective, PV inverters with the same design metrics (e.g., component selection) may become over or underdesigned under different mission profiles. This will increase the overall system cost, e.g., initial cost for overdesigned cases and maintenance cost for underdesigned cases, which should be avoided. This article, thus, explores the possibility to adapt the control strategies of PV inverters to the corresponding mission profiles. With this, similar reliability targets (e.g., component lifetime) can be achieved even under different mission profiles. Case studies have been carried out on PV systems installed in Denmark and Arizona, where the lifetime and the energy yield are evaluated. The results reveal that the inverter reliability can be improved by selecting a proper control strategy according to the mission profile.

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Mission Profile-Oriented Control for Reliability and Lifetime of Photovoltaic Inverters

Determination of chip temperature is a key element in the lifetime estimation of power devices. There are several temperature sensitive electrical parameters for this purpose, which allow accurate measuring of the chip temperature on fully packaged devices. Among all these parameters, the forward voltage of a p-n junction is probably the most widely used parameter for temperature determination of a power semiconductor device. In metal-oxide-semiconductor (MOS) gated power semiconductor devices, gate threshold voltage is an alternative parameter with high temperature resolution. In this paper, the p-n-junction forward voltage and the gate threshold voltage of MOS-gated power devices were investigated. The difference between temperature measurements via the two methods was analyzed.

Difference in Device Temperature Determination Using p-n-Junction Forward Voltage and Gate Threshold Voltage

The GaN HEMT is a novel wide bandgap device which could improve the overall efficiency and at the same time shrink the system size. In order to verify the reliability of this promising semiconductor device, new measurement and testing methods have to be developed. In this work, as a general basis for performing reliability tests junction temperature measurement methods for GaN HEMT were investigated. By using suitable temperature measurement method, several power cycling tests were performed on GaN HEMT from three different manufacturers. The main failure mechanism of the GaN HEMT from two manufacturers under power cycling tests is the degradation of solder layer between device and printed circuit board. The main failure mechanism of the devices from the third manufacturer is bond wire lift-off. In GaN the piezoelectric effect is involved in the formation of the 2DEG, and electrical characteristics are sensitive to compressive and tensile stress. The question is whether repetitive deformation leads to new failure mechanisms compared to Si devices.

Power cycling reliability results of GaN HEMT devices

In this paper, several power cycling tests under single or combined test conditions were undertaken to investigate the applicability of linear cumulative damage theory in the lifetime prediction of power semiconductor devices. The validity of this theory was verified by an experimental method for one lifetime limit, which is an increase of forward voltage at load current by 5%. The corresponding failure mechanism is the degradation of bond wire contacts.

Experimental Investigation of Linear Cumulative Damage Theory With Power Cycling Test

Various papers in power electronics contain a part of lifetime estimation depending on power cycles in application. The used model is often the CIPS08 lifetime model published at the conference CIPS 2008. In many applications, a lot of cycles with low temperature swings occur. The used model, however, is only valid for temperature swings above 40 K. For temperature swings < 30 K, there are strong deviations, since some materials are now approaching the elastic region. First experimental power cycling results are gained below 30 K temperature swing. Also an approximation for the reliability of low temperature swing is given in this paper.

Validity of power cycling lifetime models for modules and extension to low temperature swings

The dominating heating time of power semiconductor devices in 50 Hz grid connected converters in applications such as renewable energies (wind or photovoltaic) or high voltage direct current transmission is 10 ms, since the conduction losses created by the 50 Hz AC component are dominating. In the power cycling test, a heating time of several seconds is however usually used, which may trigger different failure mode and deduce a wrong lifetime. For a precise lifetime prediction of power semiconductor devices in such applications, power cycling test with heating time and temperature swing closed to the application condition is necessary. Experimental results for 10 ms heating time at small temperature swing with more than 500 million cycles to failure are presented in this paper for the first time.

Guang Zeng

Papers

Difference in Device Temperature Determination Using p-n-Junction Forward Voltage and Gate Threshold Voltage

Power cycling reliability results of GaN HEMT devices

Experimental Investigation of Linear Cumulative Damage Theory With Power Cycling Test

Validity of power cycling lifetime models for modules and extension to low temperature swings

Power cycling results of high power IGBT modules close to 50 Hz heating process