H
Hossein Pedram
Researcher at Amirkabir University of Technology
Publications - 139
Citations - 1058
Hossein Pedram is an academic researcher from Amirkabir University of Technology. The author has contributed to research in topics: Asynchronous communication & Asynchronous circuit. The author has an hindex of 16, co-authored 136 publications receiving 909 citations. Previous affiliations of Hossein Pedram include Isfahan University of Technology.
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Proceedings ArticleDOI
Mobile object tracking techniques in wireless sensor networks
TL;DR: This paper presents a survey of the state-of-the-art mobile object tracking techniques in WSNs and highlights the advantages and performance issues of the existing tracking methods and makes a brief comparison based on the design parameters proposed.
Proceedings ArticleDOI
Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction
Arash Saifhashemi,Hossein Pedram +1 more
TL;DR: This paper shows how to use Verilog HDL along with PLI (Programming Language Interface) to model asynchronous circuits at the behavioral level by implementing CSP (Communicating Sequential Processes) language constructs.
Journal ArticleDOI
Software-Based Control Flow Checking Against Transient Faults in Industrial Environments
TL;DR: A novel metric called fitness parameter is suggested which incorporates the memory limitations in some applications and the trend towards the requirement for faster execution of programs, which is a better measure than the previously proposed ones since it considers the fault coverage, the memory overhead and the execution time of each method simultaneously.
Journal ArticleDOI
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors
TL;DR: It is proved that, this method can correct up to three bit upsets and is very powerful in error detection while its error correction coverage is also acceptable considering its low computing latency.
Proceedings ArticleDOI
Globally asynchronous locally synchronous wrapper circuit based on clock gating
TL;DR: An asynchronous wrapper with new asynchronous communication port controllers and reliable clock generation scheme for locally synchronous modules is proposed by utilizing clock gating idea within GALS wrappers which makes the use of reliable and robust off-chip clock generator possible for locallyynchronous modules.