Design Automation for Embedded Systems 

About: Design Automation for Embedded Systems is an academic journal published by Springer Science+Business Media. The journal publishes majorly in the area(s): Software & SystemC. It has an ISSN identifier of 0929-5585. Over the lifetime, 395 publications have been published receiving 6043 citations.

System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search

Abstract: This paper presents two heuristics for automatic hardware/software partitioning of system level specifications. Partitioning is performed at the granularity of blocks, loops, subprograms, and processes with the objective of performance optimization with a limited hardware and software cost. We define the metric values for partitioning and develop a cost function that guides partitioning towards the desired objective. We consider minimization of communication cost and improvement of the overall parallelism as essential criteria during partitioning. Two heuristics for hardware/software partitioning, formulated as a graph partitioning problem, are presented: one based on simulated annealing and the other on tabu search. Results of extensive experiments, including real-life examples, show the clear superiority of the tabu search based algorithm.

System-Level Synthesis Using Evolutionary Algorithms

Abstract: In this paper, we consider system-level synthesis as the problem of optimally mapping a task-level specification onto a heterogeneous hardware/software architecture. This problem requires (1) the selection of the architecture (allocation) including general purpose and dedicated processors, ASICs, busses and memories, (2) the mapping of the specification onto the selected architecture in space (binding) and time (scheduling), and (3) the design space exploration with the goal to find a set of implementations that satisfy a number of constraints on cost and performance. Existing methodologies often consider a fixed architecture, perform the binding only, do not reflect the tight interdependency between binding and scheduling, do not consider communication (tasks and resources), or require long run-times preventing design space exploration, or yield only one implementation with optimal cost. Here, a model is introduced that handles all mentioned requirements and allows the task of system-synthesis to be specified as an optimization problem. The application and adaptation of an Evolutionary Algorithm to solve the tasks of optimization and design space exploration is described.

A hybrid approach of neutrosophic sets and DEMATEL method for developing supplier selection criteria

Abstract: For any organization, the selection of suppliers is a very important step to increase productivity and profitability. Any organization or company seeks to use the best methodology and the appropriate technology to achieve its strategies and objectives. The present study employs the neutrosophic set for decision making and evaluation method (DEMATEL) to analyze and determine the factors influencing the selection of SCM suppliers. DEMATEL is considered a proactive approach to improve performance and achieve competitive advantages. This study applies the neutrosophic set Theory to adjust general judgment, using a new scale to present each value. A case study implementing the proposed methodology is presented (i.e. selecting the best supplier for a distribution company). This research was designed by neutrosophic DEMATEL data collection survey of experts, interviewing professionals in management, procurement and production. The results analyzed in our research prove that quality is the most influential criterion in the selection of suppliers.

An Algorithm for Hardware/Software Partitioning Using Mixed Integer Linear Programming

Abstract: One of the key problems in hardware/software codesign is hardware/software partitioning This paper describes a new approach to hardware/software partitioning using integer programming (IP) The advantage of using IP is that optimal results are calculated for a chosen objective function The partitioning approach works fully automatic and supports multi-processor systems, interfacing and hardware sharing In contrast to other approaches where special estimators are used, we use compilation and synthesis tools for cost estimation The increased time for calculating values for the cost metrics is compensated by an improved quality of the values Therefore, fewer iteration steps for partitioning are needed The paper presents an algorithm using integer programming for solving the hardware/software partitioning problem leading to promising results

An overview of today's high-level synthesis tools

Abstract: High-level synthesis (HLS) is an increasingly popular approach in electronic design automation (EDA) that raises the abstraction level for designing digital circuits. With the increasing complexity of embedded systems, these tools are particularly relevant in embedded systems design. In this paper, we present our evaluation of a broad selection of recent HLS tools in terms of capabilities, usability and quality of results. Even though HLS tools are still lacking some maturity, they are constantly improving and the industry is now starting to adopt them into their design flows.