The goal of this paper is to study the possibility of minimizing common mode (CM) noise emission in bridgeless power factor correction (PFC) converters. Two approaches are proposed. In the first approach, the bridgeless PFC is modified to achieve symmetry. A CM noise model for symmetric topology is derived and the conditions for symmetry are summarized. Parasitics critical to the symmetrical condition are studied and carefully controlled. As a result, CM noise can be minimized with good cancellation. The second approach is to introduce a balance technique to bridgeless PFC converters. The topology is modified so that the balance technique can be applied so as to minimize CM noise. Experimental results validate that both approaches can greatly reduce CM noise up to 30 dBmuV. The two approaches are compared in terms of both its effects on CM noise and their implementations.

Common Mode EMI Noise Suppression for Bridgeless PFC Converters

This paper presents a finite-element (FE) simulation study of a planar contactless battery charging platform for portable consumer electronic equipment. Magnetic field plots of the charging platform are generated under no-load and loaded conditions so that the field distribution of the planar charging platform can be visualized. Three working modes of the platform have been investigated and compared, including full excitation and two forms of selective excitation. With new results arising from this FE simulation study and practical experiments, the theory of the magnetomotive force (mmf) generation of the multilayer planar printed-circuit-board winding array structure can be further understood. The results obtained in this paper provide a foundation of understanding for future design and optimization of planar contactless charging platforms. In addition, it has been confirmed that an electromagnetic shield structure that has been applied to coreless planar transformer applications, can work equally well for the planar charging platform.

Simulation Study and Experimental Verification of a Universal Contactless Battery Charging Platform With Localized Charging Features

Active gate driving has been demonstrated to beneficially shape switching waveforms in Si- and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 Ω. A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content.

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A 6.7-GHz Active Gate Driver for GaN FETs to Combat Overshoot, Ringing, and EMI

In this paper the well-known voltage and current DC-link converter systems, used to implement an AC/AC converter, are initially presented. Using this knowledge and their space vector modulation methods we show their connection to the family of indirect matrix converters and then finally the connection to direct matrix converters. A brief discussion of extended matrix converter circuits is given and a new unidirectional three-level matrix converter topology is proposed. This clearly shows the topological connections of the converter circuits that directly lead to an adaptability of the modulation methods. These allow the reader who is familiar with space vector modulation of voltage and current DC-link converters to simply incorporate and identify new modulation methods. A comparison of the converter concepts, with respect to their fundamental, topology-related characteristics, complexity, control and efficiency, then follows. Furthermore, by taking the example of a converter that covers a typical operation region in the torque-speed plane (incl. holding torque at standstill), the necessary silicon area of the power semiconductors is calculated for a maximum junction temperature. This paper concludes with proposals for subjects of further research in the area of matrix converters.

The essence of three-phase AC/AC converter systems

In this paper, effects of parasitic parameters on the electromagnetic interference (EMI) filter performance are first discussed. The parasitic cancellation techniques for both self- and mutual parasitics are then reviewed and their constraints are identified. The possibilities of integrating parasitic cancellation techniques into one EMI filter are analyzed. It is found that three parasitic cancellation techniques can be integrated into one EMI filter to improve both differential-mode and common-mode filter performances without any conflicts and compromises. Experiments are finally carried out to verify the integration of these three cancellation techniques.

A Study of Integration of Parasitic Cancellation Techniques for EMI Filter Design With Discrete Components

In this paper, the parasitics in both differential-mode (DM) and common-mode (CM) inductors are first discussed. The methods for both DM and CM inductor winding capacitance cancellation are then proposed. Prototypes are designed and tested, using a network analyzer. Finally, the prototypes are applied to practical power converters and electromagnetic interference (EMI) is measured. Both small signal measurement and practical EMI measurement prove that the proposed methods can efficiently reduce the effects of winding capacitance and therefore improve the inductor's filtering performance

Design of Inductor Winding Capacitance Cancellation for EMI Suppression

In this paper, the parasitics in both DM and CM inductors are first discussed. The methods for both DM and CM inductor winding capacitance cancellation are then proposed. Prototypes are designed and tested, using network analyzer. Finally, the prototypes are applied to practical power converters and EMI is measured. Both small signal measurement and practical EMI measurement prove that the proposed methods can efficiently reduce the effects of winding capacitance and therefore improve the inductor's filtering performance.

Over the past few years, the electromagnetic integration of multiple passive components into a single integrated planar power passive module has been shown viable, not only for resonant structures, but recently also for nonresonant applications. In this paper, the development of an electromagnetic model for a resonant integrated spiral planar power passive (ISP/sup 3/) structure is presented. For the design of the required passive component values to be integrated, a comprehensive electromagnetic model based on energy storage is presented. The overall structure losses including winding, core and dielectric losses are also estimated through the development of a partly one-dimensional electromagnetic field approximation. Finally, these electromagnetic models for design and loss estimation are compared to experimental results for three different prototypes of a particular design. The results show agreement to well within 10% of component and loss values in almost all cases.

J.D. van Wyk

Papers

Design of Inductor Winding Capacitance Cancellation for EMI Suppression

Design of Inductor Winding Capacitance Cancellation for EMI Suppression

Electromagnetic modeling for design and loss estimation of resonant integrated spiral planar power passives (ISP/sup 3/)