The results of minority-carrier lifetime measurements in heavily phosphorus-doped n+diffused layers of p-n junction diodes using a spectral response technique are reported in this paper. Exact modeling of current-flow equations, modified to include bandgap reduction due to high carrier concentration and Auger recombination, is used to compute the dependence of diffused-layer photocurrent J pth on the incident light energy and intensity. The photocurrent in the diffused layer is also obtained by subtracting the theoretical value of the space charge and uniformly doped p-region component from the experimentally measured photocurrent of the diode at each wavelength. Note that all calculated values based on light intensity include computed transmittance/reflectance through the oxide layer at each wavelength. The comparison of the values of J pth with J pexp , using nonlinear least square techniques, then directly gives the lifetime profile in the diffused layer. A simple expression is given for lifetime as a function of doping which may be used in modeling and prediction of device performance. Using this experimental technique it was found that the lifetime in the diffused layer is an order of magnitude less than that corresponding to uniformly doped bulk-silicon values and is very much process dependent; its value being 3.72 × 10-11s for surface concentration of 3.0 × 1020cm-3and increases to 2.9 × 10-8s at doping concentration of 1.0 × 1017cm-3.

Modeling and measurement of minority-carrier lifetime versus doping in diffused layers of n + -p silicon diodes

A method for solving numerically the two-dimensional (2D) semiconductor steady-state transport equations is described. The principles of this method have been published earlier [1]. This paper discusses in detail the method and a number of considerable improvements. Poisson's equation and the two continuity equations are discretized on two networks of different rectangular meshes. The 2D continuity equations are approximated by a set of difference equations assuming that the hole and electron current density components along the meshlines are constant between two neighboring meshpoints in a way similar to that used by Gummel and Scharfetter [2] for the one-dimensional (1D) continuity equations. The resulting difference approximations have generally a much larger validity range than the conventional difference formulations where it is assumed that the change in electrostatic potential between two neighboring points is small compared with k T/q . Therefore, a much smaller number of meshpoints is necessary than for the conventional difference approximations. This reduces considerably the computation time and the required memory space. It will be shown that the matrix of the coefficients of this set of difference equations is always positive definite. This is an important property and guarantees convergence and stability of the numerical solution of the continuity equations. The way in which the difference approximations for the continuity equations are derived gives directly consistent expressions for the current densities that can be used for calculating the currents. In order to demonstrate the kind of solutions obtainable, steady-state results for a bipolar n-p-n silicon transistor are presented and discussed.

Computer-aided two-dimensional analysis of bipolar transistors

Remarkable developments in bipolar technology over the past decade have seen the silicon germanium heterojunction bipolar transistor emerge from research labs to enter production in radio frequency technologies. These developments have allowed SiGe BiCMOS transistors to address high frequency wireless and optical communications applications that were previously only possible in III/V and II/VI devices. This book brings together for the first time all the new developments and describes in a unified manner the physics, materials science and technology of silicon bipolar transistors and SiGe heterojunction bipolar transistors.

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SiGe Heterojunction Bipolar Transistors

A sensitivity analysis is used to compute an analytical expression for the propagation delay of an emitter-coupled logic (ECL) gate in terms of the electrical parameters of the circuit. These electrical parameters are in turn related to the processing parameters through approximate analytical equations and computer simulation programs. In this way, a simple means is evolved of optimizing an ECL process for maximum circuit speed. The accuracy of the propagation-delay expression and the related equations for the electrical parameters are verified by comparison with experimental results on 6- mu m geometry circuits. By means of the propagation-delay expression, it is shown that the optimum propagation delay at 6- mu m geometry is 320 ps for a conventional process and 160 ps for a self-aligned process. On scaling to a geometry of 0.5 mu m, a propagation delay of 20 ps is predicted for a fully optimized self-aligned process. >

A propagation-delay expression and its application to the optimization of polysilicon emitter ECL processes

This paper presents a detailed comparison of the measured and computed electrical characteristics of polysilicon emitter bi-polar transistors over a wide range of processing conditions. Detailed electrical measurements are made of both the emitter resistance and the base and collector current as a function of base-emitter voltage. Devices with arsenic- and phosphorus-doped emitters are considered, as well as both with and without a deliberately grown interfacial oxide layer. The theoretical characteristics are computed using a unified model that incorporates both transport and tunneling mechanisms. It is shown that the measured emitter resistances across a wide range of processing conditions can be satisfactorily explained using a tunneling model with a single value for the electron effective barrier height (0.4 eV). Values for the modeling parameters are obtained, in some cases uniquely by measurement, and in others by fitting the experimental results. In devices with a deliberately grown interfacial oxide, the base current is suppressed to such an extent that recombination in the single-crystal emitter and in the base becomes important.

Comparison of experimental and computed results on arsenic- and phosphorus-doped polysilicon emitter bipolar transistors

An approximate two-dimensional numerical analysis has been developed for studying double- (or triple-) diffused transistors. The program supplies dc and hf terminal characteristics (e.g., h fe , r bb , f T , I B , V BE ) over a wide range of operating collector currents and voltages for a given set of physical device parameters (mask dimensions, impurity profile, etc.). The approach is based on obtaining a set of differential equations describing current flow in the longitudinal (emitter-collector) direction and a separate differential equation describing current flow in the lateral direction. The assumption is made of space-charge or space-charge-neutral regions with current- and voltage-dependent boundaries. The equations are valid for arbitrary injection levels and automatically include such high-level effects as conductivity modulation, base widening, and emitter current crowding. Both theoretical and experimental results are given for transistors with f T values between 100 MHz and 3 GHz. The validity of the approach is confirmed and some areas requiring further study are outlined. The technique described is felt to be particularly attractive for the design and optimization of high-power microwave devices, due to the small computer execution time and memory requirements.

Simplified computer-aided analysis of double-diffused transistors including two-dimensional high-level effects

Using a finite-section model for bipolar transistors with current-dependent base resistance and gain, high-current asymptotic variations of base resistance, gain and effective emitter width are studied, and useful analytic formulas are presented.

J. Sehgal

Papers

Simplified computer-aided analysis of double-diffused transistors including two-dimensional high-level effects

High-level asymptotic variation of transistor base resistance and current gain