Showing papers in "IEEE Transactions on Electron Devices in 1972"

The distribution of gains in uniformly multiplying avalanche photodiodes: Theory

Abstract: Expressions are derived for the probability P_{n,m} that a pulse initiated by n electrons (or holes) in a uniformly multiplying semiconductor diode will result in a total number of electrons (or holes) m , to give a gain m/n , and for the probability Q_{n,m} that the gain will be m/n or greater. It is shown that the distributions are far from Gaussian. The gain distribution P_{1,m} for a single photoelectron, for example, is shown to have a maximum value for m = 1 for any value of the average gain M=m/n . The derivations are valid for any electric field distribution and assume only that the hole ionization coefficient \beta(E ) can be approximated by the relation \beta(E) =k\alpha(E) , where \alpha(E) is the electron ionization coefficient and k is a constant. A method of determining an effective value of k , for cases where \beta=k\alpha is not a good approximation, is presented. The results can be used to calculate the average gain and the mean square deviation from the average, giving results in agreement with previously published relations [1], [2]. The implications of this theory on the use of avalanche diodes for low-level photodetection are discussed. It is shown that in the near infrared, cooled avalanche photodiodes can compare favorably with the best available photomultiplier when used either in a photon-counting mode, or for the reliable detection of low-level laser pulses.

Electron dynamics in short channel field-effect transistors

Abstract: The dynamics of electrons between the source and drain of a microwave field-effect transistor (FET) have been studied using a Monte Carlo method. The spatial dependence as well as the time dependence of the average electron velocity is presented. It is shown that in silicon the relaxation time is short enough not to influence the figure of merit of the transistor. However, in direct gap polar semiconductors (e.g., GaAs), the electrons can have a velocity well above their saturation value for an appreciable length of time and, consequently, over a distance nonnegligible compared to the length of the active region of a high frequency FET. This could improve the figure of merit of the FET.

Triggering phenomena in avalanche diodes

Abstract: The operation of a small area p-n junction diode above the breakdown voltage is analyzed A new formulation in terms of ionization probability is used to derive the rate of turn-on of current in such structures Two differential equations are given which may be used to compute the probability that a carrier swept into or generated within the space-charge region triggers avalanche breakdown For a 27-V n+-p diode biased 1 V above breakdown, this probability is close to 05 for an electron entering from the p side, or 01 for a hole entering from n side Experimental measurements are in good agreement with the theoretical predictions

Characterization of thin-oxide MNOS memory transistors

Abstract: A direct tunneling theory is formulated and applied to high-speed thin-oxide complementary metal-nitride-oxide-silicon (MNOS) memory transistors. Charge transport in the erase/write mode of operation is interpreted in terms of the device threshold voltage shift. The threshold voltage shift in the erase/write mode is related to the amplitude and time duration of the applied gate voltage over the full range of switching times. MNOS memory devices ( X_{o}=25 \Aring, X_{N} = 335 \Aring ) exhibit a \Delta V_{th} = \plusmn3 V for an erase/write t_{p} = 100 ns, which corresponds to an initial oxide field strength E_{ox}= 1.2 \times 10^{7} V/cm. The direct tunneling theory is applied to the charge retention or memory mode in which charge is transported to and from the Si-SiO 2 interface states. The rate of charge loss to interface states is influenced by electrical stress which alters the interface state characteristics. We discuss the fabrication of complementary high-speed MNOS memory transistors and the experimental test procedures to measure charge transport and storage in these devices.

Ink jet printing

Abstract: Several basically different nonimpact printing processes have been developed in the last several years using modulated or deflected ink jets. This review paper describes these processes, which are also applicable to the accurate dispensing of fluids, particle sorting, the generation of uniform droplets for research purposes, and other applications.

An accurate large-signal MOS transistor model for use in computer-aided design

Abstract: Some MOS transistor models for computer-aided design, each having a given accuracy and complexity, are presented. These models apply before saturation and in the saturation region. Before saturation, the proposed theory takes into account the behavior of mobility versus gate-channel and drain-source biases. In the saturation region the effect of mobile carriers on the drain-channel space-charge layer in an approximate two-dimensional analysis is taken into account. This model has been checked for dc characteristics I_{D} (V_{DS}) and different channel lengths, dynamic resistances in the saturation region, transfer characteristics of various inverters, and dynamic response of these circuits. The accuracy is within 5 percent.

Theory and experiments on surface 1/f noise

Abstract: A theoretical low-frequency noise model for the epitaxial-channel surface field-effect structure is presented where random modulation of the channel conductance arises from fluctuation of charges trapped at the oxide trap states near the Si-SiO 2 interface. In this model, charge fluctuation in the oxide traps arises from carrier tunneling between the fast interface surface states and the oxide trap states. A second fluctuation, at higher frequencies, arises from the random thermal emission and capture of electrons and holes at the fast interface states through the thermal or Shockley-Read-Hall process. Different oxide trap densities were introduced into the interface region of the metal-oxide-silicon field-effect structures using a carefully controlled and reproducible oxygen heat treatment technique. Energy distributions of the oxide trap densities are obtained from capacitance measurements. Humps are observed between the flat band and the onset of strong surface inversion (lower half of the bandgap) in both the noise power and the oxide trap density versus gate voltage (or surface band bending) plots. Theoretical noise power calculations using the experimental oxide trap density profile from the capacitance-voltage data agree very well with the experimental noise humps in both magnitudes and fine structures. It is shown that the frequency spectra of noise depend strongly on the oxide trap density profile in the oxide. It is suggested that the oxide traps are due to the excess oxygen at the SiO 2 -Si interface.

D-MOS transistor for microwave applications

Abstract: A new n-channel silicon MOS transistor is described that can be fabricated with channel lengths of less than 1 µ by using a double-diffusion process similar to that used in bipolar transistor fabrication. The dimensional tolerances are not tighter than those used in the processing of conventional MOS transistors. This device (called D-MOST) shows gain in the GHz range and a noise figure comparable to that of microwave transistors. The f max is 10 GHz and the noise figure is 4.0 dB at 1 GHz. A brief theory of the D-MOST is followed by the design considerations for a discrete microwave device. Results from s-parameter measurements in the range of 0.1-2.5 GHz are presented along with graphs showing the gains and the stability factor. A simple equivalent circuit is derived from the measurements. Applications of the D-MOST are described.

Electrical properties of nickel-low-doped n-type gallium arsenide Schottky-barrier diodes

Abstract: The forward current characteristics of nickel-low-doped n-type gallium arsenide Schottky-barrier diodes are measured over the temperature range 905-434 K The ideality factor and its temperature dependence is determined and found to decrease with increasing temperature according to the relationship n(T) = 114T^{-1/2} +0444 to within ±4 percent This is in agreement with the theoretical analysis of Strikha, who predicted a temperature dependence law between T-1and T^{-1/2} The barrier height is determined from both the saturation current and the capacitance methods A modification is made to the forward current expression, which results in good agreement between the values of the barrier height obtained from both methods over a wide temperature range The barrier height is found to decrease with increasing temperature at a rate of 58 × 10 -4 V/K Comparison with the dependence of the energy gap on temperature in GaAs suggests that the observed change in the barrier height is equal to that of E g

Properties of MNOS structures

Abstract: The properties of thin oxide MNOS structures are studied. An analytical theory for the switching time constant is derived and curves of the switching time constant versus the nitride field are computed. These curves are useful in the design of MNOS-memory transistors. The theory is compared with experiments. The normal current in the thin oxide MNOS structures is assumed to be a modified Fowler-Nordheim current. At small oxide thicknesses and low nitride field, an additional current is shown to exist that is attributed to direct tunneling into traps in the nitride. The discharge of MNOS structures is briefly discussed and is shown to be due to a direct tunneling of charge carriers from traps in the nitride into the semiconductor.

The distribution of gains in uniformly multiplying avalanche photodiodes: Experimental

Abstract: Experimental measurements of the gain distribution and noise spectral density of silicon avalanche photodiodes are presented and compared with McIntyre's theories [7], [8]. Excellent agreement is obtained using k eff , the effective ratio of the hole and electron ionization coefficients, as the only adjustable parameter.

Noise behavior of GaAs field-effect transistors with short gate lengths

Abstract: The noise behavior of the GaAs Schottky-barrier gate field-effect transistor has been investigated theoretically and experimentally. It has been found that an additional noise source has to be taken into account in GaAs FET's biased in the pinchoff region: the intervalley scattering noise. This noise source has been investigated and a new transistor noise model is proposed. Measured and calculated noise figures show good agreement in the frequency range 2-10 GHz. It is shown that the influence of the intervalley scattering noise can be reduced by reducing the channel thickness, and that such devices show excellent gain and noise properties in the X band.

Semiconductor current-flow equations (diffusion and degeneracy)

Abstract: The correct form for the current-flow equation in semiconductors in the presence of density and temperature gradients, as well as electric fields, is derived from a perturbation solution of Boltzmann's equation. The conditions under which the various widely used approximate forms of the current-flow equation are valid are clearly discussed. A new term that occurs if the relaxation time depends on position is derived, and is shown to be comparable in magnitude to the other terms in the current-flow equation.

Steady-state junction temperatures of semiconductor chips

Abstract: The temperature drop between a transistor junction and the base of a silicon chip is dependent upon the power to be dissipated as well as the geometry of the device. This problem in three-dimensional heat conduction is analytically solved for boundary conditions which approximate a set of operating conditions. Nondimensional curves and examples summarizing typical solutions have been included to illustrate problem solving techniques.

Free charge transfer in charge-coupled devices

Abstract: The free charge-transfer characteristics of charge-coupled devices (CCD's) are analyzed in terms of the charge motion due to thermal diffusion, self-induced drift, and fringing field drift. The charge-coupled structures considered have separations between the gates equal to the thickness of the channel oxide. The effect of each of the above mechanisms on charge transfer is first considered separately, and a new method is presented for the calculation of the self-induced field. Then the results of a computer simulation of the charge-transfer process that simultaneously considers all three charge-motion mechanisms is presented for three-phase CCD's with gate lengths of 4 and 10 µ. The analysis shows that while the majority of the charge is transferred by means of the self-induced drift that follows a hyperbolic time dependence, the last few percent of the charge decays exponentially under the influence of the fringing field drift or thermal diffusion, depending on the design of the structure. The analysis shows that in CCD's made on relatively high resistivity substrates, the transfer by fringing-field drift can be very fast, such that transfer efficiencies of 99.99 percent are expected at 5- to 10- MHz bit rates for 10-µ gate lengths and at up to 100 MHz for 4-µ gate lengths.

A feedback method for investigating carrier distributions in semiconductors

Abstract: The capacitance-voltage relationships of abrupt reverse-biased p-n junctions have long been used to investigate semiconductor doping distributions. Such investigations usually employ accurate point by point C-V measurements or else RF harmonic generation to provide the required detailed connection between a small change in junction voltage and the associated quantity of charge flowing around the external circuit. The method described here differs in that a feedback loop is used in such a way as to provide a controlled motion of the low-field boundary of the depletion layer. This motion can be one of two kinds, either that of a constant amplitude modulation of the depletion layer width or else a motion corresponding to a constant amplitude modulation of the electric field. In the former case the information obtained corresponds to the carrier density N(x) , while in the latter it is its reciprocal. In practice this approach provides a number of advantages. Among these is the ability to mount the sample at the end of coaxial cables of essentially arbitrary length. This has allowed such applications as on-line profiling during accelerator implantations and profiling devices in cryostats to obtain information on free-carrier concentrations as a function of temperature. In the present paper the basis of the method and its implementation are outlined and some representative results are given.

Microminiature ganged threshold accelerometers compatible with integrated circuit technology

Abstract: The device described permits threshold acceleration detection in a wide range from a few ten's of g's up to maybe 100 000 g's. It is a threshold sensing device with an extremely high on-to-off resistance ratio. The device consists of a flexible metal beam and an associated contact pad, which is activated by the force of the beam's inertial mass when being accelerated in a direction normal to the contact plane. The mechanical and electrical operation of the accelerometer is analyzed and expressions are given for the relationship between beam deflection, acceleration detection level, and various required beam dimensions. A batch fabrication procedure is demonstrated and acceleration test results up to 8000 g's are reported for multiple ganged accelerometers.

A linear-sweep MOS-C technique for determining minority carrier lifetimes

Abstract: A nonpulse MOS-C τ 0 measurement procedure, based upon the capacitance-voltage characteristics derived in response to a linear voltage sweep initiated and maintained under inversion biases, is described, analyzed, and illustrated. The most significant advantages of the procedure are interpretational and instrumentational simplicity. For typical dopings and oxide thicknesses, the conveniently measured lifetime range covers 0.1 µs ≲ τ 0 ≲ 10 µs. About a decade improvement in the limits on the conveniently measured lifetime range can be achieved by employing relatively thin (0.1 µ) or relatively thick (1 µ) oxides.

The Ruticon family of erasable image recording devices

Abstract: Ruticons are solid-state cyclic image recording devices. They have a layered structure consisting of a conductive transparent substrate, a thin photoconductive layer a thin deformable elastomer layer, and a deformable electrode such as a conductive liquid, a conductive gas, or a thin flexible metal layer. When an electric field is placed between the conductive substrate and the deformable electrode the elastomer will deform into a surface relief pattern corresponding to the light-intensity distribution of an image focused on the photoconductor. Light modulated by the deformation of the elastomer surface can in turn be converted to an intensity distribution similar to the original image by means of simple optics. Ruticons are expected to find initial applications in image intensification, holographic recording, and optical buffer storage.

Measurement of emitter and collector series resistances

Abstract: Emitter and collector series (extrinsic) resistances can be evaluated by measuring the open-circuited (floating) junction voltage as the other junction is forward biased. Evaluation can be carried out on either a point-by-point basis or with the aid of a curve tracer. Specific results are indicated for a 2N4400 transistor and an experimental transistor.

Thermal effects in JFET and MOSFET devices at cryogenic temperatures

Abstract: Various JFET and MOSFET devices have been studied at LN and LHe temperatures. Transient and steady-state heating of the devices at 4.2 K is investigated and it is found that the active part of the device typically heats to a steady-state temperature of 40-60 K. A transient and steady-state heating model of the device is constructed and the results are found to be in good agreement with the measured temperatures and heating transients. Studies of the noise at the various ambient temperatures show that different physical phenomena are responsible for the noise. Low-frequency noise in JFET's seems to be of generation-recombination type. Thermal noise is prevalent in the frequency region between 100 kHz and 1 MHz. The noise in some of the MOSFET devices increases with decreased temperature and seems to be surface state or "flicker" noise, The noise in MOSFET devices is by factor 5-100 times larger than the noise in investigated JFET devices.

Simplified computer-aided analysis of double-diffused transistors including two-dimensional high-level effects

Abstract: An approximate two-dimensional numerical analysis has been developed for studying double- (or triple-) diffused transistors. The program supplies dc and hf terminal characteristics (e.g., h fe , r bb , f T , I B , V BE ) over a wide range of operating collector currents and voltages for a given set of physical device parameters (mask dimensions, impurity profile, etc.). The approach is based on obtaining a set of differential equations describing current flow in the longitudinal (emitter-collector) direction and a separate differential equation describing current flow in the lateral direction. The assumption is made of space-charge or space-charge-neutral regions with current- and voltage-dependent boundaries. The equations are valid for arbitrary injection levels and automatically include such high-level effects as conductivity modulation, base widening, and emitter current crowding. Both theoretical and experimental results are given for transistors with f T values between 100 MHz and 3 GHz. The validity of the approach is confirmed and some areas requiring further study are outlined. The technique described is felt to be particularly attractive for the design and optimization of high-power microwave devices, due to the small computer execution time and memory requirements.

Theory of a forward-biased diffused-junction P-L-N rectifier—Part I: Exact numerical solutions

Abstract: Exact numerical solutions have been obtained for a forward-biased diffused-junction n+-p-p+silicon rectifier operating from low to high injection levels. The results indicate that under high-level injection conditions, there exists a quasi-neutral region (i.e., a region wherein the electron and hole concentrations are very nearly equal) in the device which is not confined to the lightly doped p-base region but stretches into the diffused n+region as the injection level increases. For the impurity profile and the Shockley-Read-Hall recombination model used, it is additionally found that the quasi-Fermi potentials for both electrons and holes are constant across a large portion of the diffused region adjoining the quasi-neutral or "effective base" region. The most significant finding, however, is that at the boundary between the effective base region and the diffused region, the hole current varies more or less directly as the carrier concentration, in contrast to the situation in a step-junction rectifier where the minority carrier current in the heavily doped regions varies as the square of the carrier concentration at the base edge. A simple analysis shows that this linear relationship can be related to the constant quasi-Fermi potentials across the diffused region. As a consequence of the aforementioned linear relationship, the injection efficiency of the diffused junction is roughly independent of the injection or current levels. It may be high or low depending on whether the concentration of recombination centers in the diffused region is small or large compared to that in the base region. This is unlike the situation in a step junction where the injection efficiency would be initially high and then degrade, as the current increases.

Determination of deep levels in semiconductors from C-V measurements

Abstract: A method is presented that allows deep level density and energy of impurities in semiconductors to be routinely determined from simple C-V measurements of Schottky barriers. The method is particularly useful for material having levels with very long time constants that are not accessible by noise spectra measurements. The technique is illustrated by measurements of epitaxial n-GaAs which show a donor level at 0.83 eV below the conduction band.

Yield degradation of integrated circuits due to spot defects

Abstract: Economy of integrated circuit fabrication in the presence of quasi-randomly distributed spot defects is described. The distribution of the defects is represented in terms of density and modeled as follows : 1) they are randomly distributed within a limited area; 2) the density in a wafer changes concentrically; and 3) the density is normally distributed from wafer to wafer with uniform deviation throughout a wafer. The yield degradation phenomenon due to such defects has been analyzed using a computer simulation technique. The effect of density variations in a wafer and between wafers has been mainly investigated. An extensive numerical study leads to the following conclusions. 1) The deviation of the yield versus chip-area relation from the simple exponential law is influenced more greatly by the nonuniform defect distribution in a wafer than by the density variation between wafers. 2) The increase of average yield due to the density variation between wafers is sometimes offset by the decrease of the accuracy in yield prediction. Process stabilization is essential for the economical production of a few large-scale chips.

Modeling of avalanche effect in integral charge control model

Abstract: A compact model for bipolar transistors (integral charge control model) which includes many high-level effects has recently been developed. This model has been shown to give much more accurate results than the conventional Ebers-Moll model. However, avalanche effects have not been included previously. Here a simple expression is developed for the avalanche current generated in the collector junction of a transistor. Avalanche current calculated from this expression agrees very well with the results of exact numerical calculations, which solve the Poisson equation and continuity equations for a realistic structure. With this simple expression, avalanche effects can be incorporated into the integral charge control model with the addition of three model parameters. Output characteristics have been calculated with such a modified integral charge control model and compare very well with measured results demonstrating the accuracy of the avalanche modeling.

Temperature dependence of low-frequency excess noise in junction-gate FET's

Abstract: The low-frequency noise in silicon JFET's was measured continuously for temperatures varying from 30 to 300 K. Distinct peaks in the noise were observed for all transistors tested, suggesting the presence of distinct trapping levels in the forbidden gap. An attempt to match theory with experiment indicates that one of the peaks can be explained by the presence of gold in the silicon as expected. However, a discrete trapping level cannot explain the second peak observed in the noise, as unrealistic capture cross sections for the traps would be required. It appears that the mechanism causing this second peak also contributes to the noise level at higher frequencies, and more work must be done to determine the exact nature of the processes involved. A third peak at lower temperatures cannot be explained with present theory. Possible causes of the noise appear to be dislocations in the crystal lattice, gold acceptors, and a splitting of the gold level due to strain.

Noise in IMPATT diodes: Intrinsic properties

Abstract: The design of low-noise IMPATT diodes has been aided by theories describing the noise generation under small-signal conditions. A major deficiency in this procedure has existed in that there is no apparent connection between the small-signal behavior and the great increases in the noise observed in large-signal operation. As a remedy a theory has been developed for the noise generation at arbitrary signal levels by using a Read diode model. The theory is based on a linearization technique for calculating the spectrum of homogeneous noise with linear damping resulting in a separation of the large-signal and noise problems. The open-circuit noise voltage increases strongly at high signal levels due to nonlinear parametric interactions and gives rise to a rapid increase in the noise measure as a function of the generated microwave power. Operating parameters are derived that optimize the power-noise ratio. A long intrinsic response time is found to be beneficial in achieving high power as well as low noise. Other factors affecting the design and choice of material for IMPATT diodes are discussed. An important feature of the presented theory is that a complete design optimization with respect to the power-noise characteristics can be carried out provided reliable information exists about the ionization rates and the drift velocities. A simpler alternative is to obtain the physical quantities governing the power-noise behavior from small-signal admittance and noise measurements. Good agreement has been obtained with experimental power-noise measurements by this method. As an application of this procedure a state of the art comparison is given for GaAs, Ge, and Si diodes at 6 GHz.

On the microwave activity of punchthrough injection transit-time structures

Abstract: The microwave properties of punchthrough injection diodes exhibiting transit-time dependent negative resistances have been investigated experimentally in both the small- and large-signal regimes. The particular devices involved were p+-n-p+, M-n-p+, and p+-ν-n-p+silicon structures. Extensive small-signal admittance measurements indicated that the negative conductance of these devices arose predominantly from the transit-time delay of carriers with nearly saturated velocities. The observed minimum negative Q factors and the variation of device susceptance with frequency were not, however, consistent with the most simple transit-time analysis. The temperature dependence of device admittance was principally attributable to the influence of the corresponding variation of carrier velocity versus electric field. The injection properties of the Shottky-barrier emitter in the M-n-p+structure made this device more temperature sensitive than the companion p+-n-p+structure. A comparison of device capabilities as free-running oscillators indicated that further increases in output power may result with increased n-region impurity concentrations. A large-signal effect was identified, which enabled significant power generation at frequencies less than the minimum frequency for small-signal negative resistance. Detailed measurements of device admittance and bias rectification versus RF voltage were obtained from tuned amplifier experiments. The largest Pf2product was achieved from a p+-ν-n-p+structure that produced 115 mW at 6.3 GHz.

Performance limitations of the IGFET bucket-brigade shift register

Abstract: The IGFET bucket brigade in integrated circuit form is a particularly simple structure for implementing dynamic charge transfer shift registers. Experimental and analytical studies show that incomplete charge transfer is an important limitation of register performance leading to signal degradation. This sets an upper limit to the clock frequency and to the number of stages in the register. The effects leading to incomplete charge transfer include: 1) the finite rate at which charge moves from one capacitor to the next through the IGFET transconductance; 2) the reduction in transfer rate (due to IGFET output conductance) when part of the charge has already been transferred to the drain; and 3) the loss of charge to interface states. The relative importance of these effects depends on device structure, clock frequency, clock voltage amplitude, and waveform. Under most operating conditions the IGFET output conductance contribution is most important, and the best results were obtained with a structure that minimized the effect. Experimental data show that p-channel registers in 31-bit strings can be operated satisfactorily to clock frequencies in excess of 5 MHz, and that by appropriate register design significantly better performance should be possible.