This paper introduces an enhanced equivalent model of the half-bridge symmetrical monopole Modular Multilevel Converter (MMC) topology for the analyses of the electromagnetic transients As compared with the existing MMC models, the proposed model reduces the simulation computational time without compromising accuracy, and contrary to the existing models, it provides accurate representation of the MMC behavior with respect to the DC-side fault This paper also evaluates and verifies the accuracy of the proposed equivalent model under various operating conditions, ie, start-up, DC-side pole-to-pole fault, and AC-side three-phase to ground fault The study results indicate that: 1) in contrast to the existing equivalent models, the proposed enhanced model accurately represents the MMC under various operating conditions; 2) the implemented simplifications to the model do not adversely affect the accuracy of the simulation results; 3) a reduced-level approximated model of the MMC is also adequately accurate for protection studies

Enhanced equivalent model of the Modular Multilevel Converter

High-performance gate drive power supply (GDPS) plays a crucial role in ensuring the reliability and safety of the gate driver for power semiconductor devices. This article focuses on the design of a high-voltage-insulated GDPS for the 10-kV silicon carbide MOSFET in medium-voltage (MV) application. Design considerations, including insulation scheme, high-voltage-insulated transformer design, and load voltage regulation scheme, are proposed. In addition, the performance of the secondary-side-regulated (SSR) GDPS and that of the primary-side-regulated (PSR) GDPS are compared for several aspects, including interwinding capacitance, load voltage regulation rate, conversion efficiency, and hardware complexity. Finally, an SSR GDPS and a PSR GDPS, with an insulation voltage of 20 kV, are built in the lab. The test results demonstrate that the PSR GDPS is more preferable because of lower interwinding capacitance, lower load voltage regulation rate, higher conversion efficiency, and simpler control circuit.

Design Considerations for High-Voltage Insulated Gate Drive Power Supply for 10-kV SiC MOSFET Applied in Medium-Voltage Converter

Increased switching speeds of wide bandgap (WBG) semiconductors result in a significant magnitude of the displacement currents through power module parasitic capacitances that are inherent in packaging design. This is of increasing concern, particularly in case of newly emerging medium-voltage (MV) SiC MOSFETs since the magnitude of the displacement currents can be several order higher due to the fast switching transients and increased voltage magnitudes of the SiC MOSFETs compared to their Si counter parts. The severity intensifies when the magnitude of the displacement current becomes comparable to a significant fraction of SiC MOSFETs rated current, leading to the worsened impact on the converter electromagnetic interference (EMI) as well as performance in terms of switching losses. The key objective of this article is to provide a detail insight into the impact of the module parasitic capacitances on the SiC MOSFET switching dynamics and losses. To realize this, a well-defined approach to dissect the switching energy dissipation is proposed, based on which the detailed analysis and quantitative measurements of the module parasitic capacitance impact on terms of added switching energy losses, and common-mode currents are investigated using a custom-packaged 10-kV half-bridge SiC MOSFET power modules. The theoretical analysis and experimental results obtained from dynamic as well as static characterization reveal that the impact of the module parasitic capacitance on the switching energy dissipation is twofold and substantially adverse such that it cannot be overlooked considering its intended application in the high-power MV power electronic converters.

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Impact of Power Module Parasitic Capacitances on Medium-Voltage SiC MOSFETs Switching Transients

While 10-kV silicon-carbide (SiC) MOSFETs are gradually penetrating medium-voltage (MV) applications, intertwined challenges concerning high-voltage insulation, high ${dv}/{dt}$ , protections, and thermal management are simultaneously imposed to MV converters. For the modular multilevel converter, a systematical power cell design and assessment methodology (DAM) to tackle the unprecedented challenge synergy is essential and, yet, absent. Thereby, this article aims to develop a DAM based on a high-current 10-kV SiC MOSFET half-bridge module. An overall introduction of the power cell and a hierarchical DAM workflow is first presented, followed by the comprehensive component-level DAM with details on design challenges, solutions, assessment instruments, procedures, and test results. Subsequently, the DAM is expanded to the power cell level by exploring its safe operating area associated with switching frequency, power-processing capability, and temperature limit in various operation modes, which, in turn, validates the component designs and determines if they need iterations. Following the methodology, the power cell design is finalized, capable of continuous operation under 6 kV, 84-A rms, and 10 kHz, exhibiting 99.3% efficiency and transient immunity up to 100 V/ns.

Power Cell Design and Assessment Methodology Based on a High-Current 10-kV SiC MOSFET Half-Bridge Module

The auxiliary power supply (APS) is one of the critical components inside medium-voltage (MV) power converters. Besides high insulation capability and small footprint, low common-mode (CM) coupling capacitance and multichannel output are the desired features of APS in the emerging silicon-carbide-based MV converters due to their fast switching speed. This article presents the design and optimization procedure of a high-density isolated APS using an LCCL-LC resonant topology with an operating frequency of 1 MHz. The proposed design procedure attains consistent soft-switching operation under a random number of output channels. The galvanic isolation is realized by a current-fed single-turn 1 MHz transformer that can achieve a breakdown voltage of over 20 kV while maintaining a small size. Design optimization on the insulation system of the current transformer is proposed to obtain both high partial-discharge inception voltage (PDIV) and low coupling capacitance. Finally, two versions of APSs are developed, using air and silicone as dielectric materials, which can reach PDIV of over 5 and 16 kV, respectively. The corresponding coupling capacitances are 1.86 pF and 3.6 pF. Both designs can provide a maximum power of 20 W on the receiving side, and 120 W on the sending side.

A Multichannel High-Frequency Current Link Based Isolated Auxiliary Power Supply for Medium-Voltage Applications

Using high voltage (HV) silicon carbide (SiC) power semiconductors in a modular multilevel converter (MMC) is promising because it results in fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulsewidth modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of the single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this article, limiting the maximum dv/dt to the dv/dt of a single power semiconductor and also maintaining the voltage balance performance. The proposed voltage balancing control is experimentally validated in a 10-kV SiC mosfet based MMC with four submodules per arm.

A Novel Voltage Balancing Control With dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter

Medium voltage (MV) power converters using high voltage (HV) Silicon Carbide (SiC) power semiconductors result in great benefits in weight, size, efficiency and control bandwidth. However, challenges still exist on the components design considering HV insulation and noise immunity requirements in the MV SiC based power converter. A 5-level MMC based transformer-less grid-connected dc/ac converter is developed for 13.8 kV medium voltage grid using 10 kV SiC MOSFETs. The key components, including gate driver with high dv/dt immunity and fast reliable protection, isolated power supply with low parasitic capacitance, voltage/current sensors with high noise immunity, and passives following related insulation standard are provided. A 25 kV dc-link phase-leg is demonstrated, and the experimental results are presented.

Medium Voltage (13.8 kV) Transformer-less Grid-Connected DC/AC Converter Design and Demonstration Using 10 kV SiC MOSFETs

In a converter based on 10 kV SiC MOSFETs, major sources of parasitic capacitance are the anti-parallel junction barrier schottky (JBS) diode, heat sink, and load inductor. A half bridge phase leg test setup is built to investigate these parasitic capacitors' impact on the switching performance at 6.25 kV. Generally these parasitic capacitors slows down both turn-on and turn-off transient and can cause significant increase in switching energy loss. The impact of the parasitic capacitor in the load inductor is analyzed, which has either very short wire or long wire in series. Switching performance of the phase leg with two different thermal designs are compared to investigate the impact of the parasitic capacitor due to the heat sink. The large parasitic capacitor due to the large drain plate of discrete 10 kV SiC MOSFET for heat dissipation can result in 44.5% increase in switching energy loss at low load current.

Parasitic Capacitors' Impact on Switching Performance in a 10 kV SiC MOSFET Based Converter

The performance of the gate drive power supply (GDPS) greatly impacts the safety and reliability of the gate drive for power semiconductor power devices. This paper focuses on the design of isolated gate driver power supply for 10 kV silicon-carbide (SiC) MOSFET for medium-voltage (MV) applications. Different insulation schemes are compared for the high-voltage insulated transformer in GDPS. Impact factors for transformer interwinding capacitance are analyzed, with which, a low inter-winding capacitance design approach is proposed for the high-voltage insulated transformer. Furthermore, an upward-voltage-reference based voltage regulation scheme is proposed for achieving good load regulation without output voltage feedback. Finally, a 20-kV-insulated GDPS is built and tested, and experimental results are presented to verify the effectiveness of the design approach.

James Palmer

Papers

Design Considerations for High-Voltage Insulated Gate Drive Power Supply for 10-kV SiC MOSFET Applied in Medium-Voltage Converter

A Novel Voltage Balancing Control With dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter

Medium Voltage (13.8 kV) Transformer-less Grid-Connected DC/AC Converter Design and Demonstration Using 10 kV SiC MOSFETs

Parasitic Capacitors' Impact on Switching Performance in a 10 kV SiC MOSFET Based Converter

Design Considerations of High-Voltage-Insulated Gate Drive Power Supply for 10 kV SiC MOSFET in Medium-Voltage Application