An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

Power semiconductor devices and methods of manufacture

This invention generally relates to power semiconductor devices, and in particular to improved thyristor devices and circuits. The techniques we describe are particularly useful for so-called MOS-gated thyristors. We describe a thyristor comprising a plurality of power thyristor devices connected in parallel, each said thyristor device being operable at a device current which the device has an on-resistance with a positive temperature coefficient.

Power Semiconductor Devices

Semiconductor Power Devices

AlGaN-GaN power high-electron mobility transistors (HEMTs) with 600-V breakdown voltage are fabricated and demonstrated as switching power devices for motor drive and power supply applications. The fabricated power HEMT realized the high breakdown voltage by optimized field plate technique and the low on-state resistance of 3.3 m/spl Omega/cm/sup 2/, which is 20 times lower than that or silicon MOSFETs, thanks to the high critical field of GaN material and the high mobility in 2DEG channel. The fabricated devices also demonstrated the high current density switching of 850 A/cm/sup 2/ turn-off. These results show that AlGaN-GaN power-HEMTs are one of the most promising candidates for future switching power device for power electronics applications.

High breakdown voltage AlGaN-GaN power-HEMT design and high current density switching behavior

High-voltage MOS transistors with blocking voltages of up to 1000 V and turn-on resistances of less than 2 Ω were developed and tested. The transistor structure itself is that of a vertical SIPMOS+(1) power transistor. Retaining this technology, a special design of the cell field and a new type of chip edge construction became necessary in order to achieve the quoted values. The required constructional dimensions were obtained with the aid of a two-dimensional modelling program. (+SIPMOS = Siemens Power MOS)

Power MOS transistors for 1000 V blocking voltage

A signal voltage (E) based upon a supply voltage must be converted to a signal voltage (A) with ground reference so as to enable further processing in a logic circuit. A simple level converter comprises a series connection of a MOSFET (T1) connected to the supply voltage; the MOSFET also comprises a resistor (T2). The source terminal of the MOSFET (T1) is located at the potential of the supply voltage. The voltage to be converted is applied between the gate terminal and the source terminal, and the converted voltage occurs at the resistor (T2). The two voltages are each limited by one Zener diode (D2, D1).

Integrable buffer circuit for voltage level conversion having clamping means

A charge coupled device (CCD-device) for sensors and memory is produced so as to have a bipolar structure, with the doped regions and zones thereof being produced by ion implantation whereby a greater structure density is attained along with a reduction in the transfer coefficient e.

Process for producing bi-polar charge coupled devices by ion-implantation

The invention relates to an optoelectronic sensor with at least one sensor element according to the principle of charge injection (CID), the surface of a doped semiconductor body 1 two closely adjacent to each other and from the semiconductor surface insulated by a thin insulating layer 5, controllable via separate control lines electrode 4.10 face. According to the invention, the semiconductor body 1 includes on its surface under an electrode 10, a more doped region 6 of the type of semiconductor doping, which slightly into the underlying electrode 4 of the other semiconductor surface extends itself. As a result, between the two electrodes,. B. a row electrode and a column electrode, a narrow potential barrier generated. The charge optically generated by an electrode displaced under the other electrode, this potential barrier prevents backflow of the charge under the deflated electrode. This allows a floating reading can be eliminated on the column lines in the couplings of the row lines. Preferably, the more heavily doped region 6 (Fig. 1) tapers wedge-shaped at the other electrode 4, and is produced by implantation, in which the field oxide and the electrode 4 is used as an implantation mask, whose edges are bevelled.

Opto-electronic sensor based on the principle of charge injection and method for making it

Der Durchlaswiderstand R on von fur hohe Sperrspannungen ausgelegten Leistungs-MOSFET ist relativ hoch. The on-state resistance R on of which is designed for high blocking voltages power MOSFET is relatively high. Er last sich durch eine im Substrat angeordnete Injektorzone (11) herabsetzen, die an eine externe Stromquelle anschliesbar ist. It can be decreased by an injector disposed in the substrate (11), which is connectable to an external power source. Die Injektorzone ist Bestandteil eines Bipolartransistors (B), der uber die Gateelektrode (10) des FET mit steigender Gatespannung eingeschaltet wird und Ladungstrager in den Strompfad emittiert. The injector is part of a bipolar transistor (B), which is over the gate electrode (10) of the FET switched on with increasing gate voltage and emitting charge carriers in the current path. Damit wird quasi die Dotierung des Substrates (2) erhoht und R on verringert. In order for the doping of the substrate (2) is quasi increased and R on reduced.

Jenö Dr. Tihanyi

Papers

Power MOS transistors for 1000 V blocking voltage

Integrable buffer circuit for voltage level conversion having clamping means

Process for producing bi-polar charge coupled devices by ion-implantation

Opto-electronic sensor based on the principle of charge injection and method for making it

IGFET with injector zone