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Showing papers by "Johann W. Kolar published in 2002"


Proceedings ArticleDOI
07 Aug 2002
TL;DR: In this article, a three-phase AC-DC-AC sparse matrix converter (SMC) with no energy storage elements in the DC link and employing only 15 IGBTs was proposed.
Abstract: A novel three-phase AC-DC-AC sparse matrix converter (SMC) having no energy storage elements in the DC link and employing only 15 IGBTs as opposed to 18 IGBTs of a functionally equivalent conventional AC-AC matrix converter (CMC) is proposed. It is shown that the realization effort could be further reduced to only 9 IGBTs (ultra sparse matrix converter, USMC) in case the phase displacement of the fundamentals of voltage and current at the input and at the output is limited to /spl plusmn//spl pi//6. The dependency of the voltage and current transfer ratios of the systems on the operating parameters is analyzed and a space vector modulation scheme is described in combination with a zero current commutation procedure. Furthermore, a safe multi-step current commutation concept is treated briefly. Conduction and switching losses of the SMC and USMC are calculated in analytically closed form. Finally, the theoretical results are verified in Part II of the paper by digital simulations and results of a first experimental investigation of a 10 kW/400 V SMC prototype are given.

270 citations


Journal ArticleDOI
TL;DR: A novel DC-AC converter for applications in the area of distributed energy generation systems, e.g., solar power systems, fuel-cell power systems in combination with supercapacitor or battery energy storage, using an isolated multicell topology is presented.
Abstract: This paper presents a novel DC-AC converter for applications in the area of distributed energy generation systems, e.g., solar power systems, fuel-cell power systems in combination with supercapacitor or battery energy storage. The proposed converter is realized using an isolated multicell topology where the total AC output of the system is formed by series connection of several full-bridge converter stages. The DC links of the full bridges are supplied by individual DC-DC isolation stages which are arranged in parallel concerning the dc input of the. total system. Therefore, all switching cells of the proposed converter can be equipped with modern low-voltage high-current power MOSFETs, which results in an improved efficiency as compared to conventional isolated DC-AC converters. Furthermore, the cells are operated in an interleaved pulsewidth-modulation mode which, in connection with the low voltage level of each cell, significantly reduces the filtering effort on the AC output of the overall system. The paper describes the operating principle, analyzes the fundamental relationships which are relevant for component selection, and presents a specific circuit design. Finally, measurements taken from a 2-kW laboratory model are presented.

231 citations


Journal ArticleDOI
TL;DR: The cells are operated in a phase-shifted interleaved pulsewidth-modulation mode, which reduces the filtering effort at the output of the total amplifier to a large extent and improves the dynamic system behavior.
Abstract: This paper presents a novel switch-mode power amplifier based on a multicell multilevel circuit topology. The total output voltage of the system is formed by series connection of several switching cells having a low DC-link voltage. Therefore, the cells can be realized using modern low-voltage high-current power MOSFET devices and the DC link can easily be buffered by rechargeable batteries or "super" capacitors to achieve very high amplifier peak output power levels ("flying-battery" concept). The cells are operated in a phase-shifted interleaved pulsewidth-modulation mode, which, in connection with the low partial voltage of each cell, reduces the filtering effort at the output of the total amplifier to a large extent and, consequently, improves the dynamic system behavior. The paper describes the operating principle of the system, analyzes the fundamental relationships being relevant for the circuit design, and gives guidelines for the dimensioning of the control circuit. Furthermore, simulation results as well as results of measurements taken from a laboratory setup are presented.

110 citations


01 Jan 2002
TL;DR: In this article, a three-phase AC-DC-AC Sparse Matrix Converter (SMC) with no energy storage elements in the DC link and employing only 15 IGBTs (USMC) was proposed, where the phase displacement of the voltage and current at the input and at the output is limited to ±π/6.
Abstract: A novel three-phase AC-DC-AC Sparse Matrix Converter (SMC) having no energy storage elements in the DC link and employing only 15 IGBTs as opposed to 18 IGBTs of a functionally equivalent conventional AC-AC matrix converter (CMC) is pro- posed. It is shown that the realization effort could be further reduced to only 9 IGBTs (Ultra Sparse Matrix Converter, USMC) in case the phase displacement of the fundamentals of voltage and current at the input and at the output is limited to ±π/6. The dependency of the voltage and current transfer ratios of the systems on the operating parameters is analyzed and a space vector modulation scheme is described in combination with a zero current commutation proce- dure. Furthermore, a safe multi-step current commutation concept is treated briefly. Conduction and switching losses of the SMC and USMC are calculated in analytically closed form. Finally, the theoretical results are verified in Part II of the paper by digital simulations and results of a first experimental investigation of a 10kW/400V SMC prototype are given.

69 citations


Proceedings ArticleDOI
U. Drofenik1, Johann W. Kolar1
07 Nov 2002
TL;DR: This paper introduces the Interactive Power Electronics Seminar-iPES-a new software for teaching a basic course on power electronic circuits and systems and is comprised of an easy-to-use self-explaining graphical user interface.
Abstract: This paper introduces the Interactive Power Electronics Seminar-iPES-a new software for teaching a basic course on power electronic circuits and systems. iPES is constituted by HTML text with Java-applets for interactive animation, circuit design and simulation and visualization of electromagnetic fields and is comprised of an easy-to-use self-explaining graphical user interface. The software does need just a standard web-browser, i.e. no installations are required. iPES can be accessed via the World Wide Web or from a CD-ROM in a stand-alone PC by students and professionals. Since the Java applets are simple to handle, a student can immediately start working and can fully concentrate on the theory of a problem. Due to the underlying software technology iPES is very flexible and can be used for on-line learning and be easily integrated into an e-learning platform. The aim of this paper is to give an introduction to the iPES-project and to show different areas covered. The e-learning software is available at no cost in English, German, Japanese and Korean. More translations, e.g. into Spanish and French will be available in the future. The web page is continuously updated in four-week intervals.

63 citations


Proceedings ArticleDOI
U. Drofenik1, Johann W. Kolar1
07 Aug 2002
TL;DR: This paper introduces a new software tool "iPES - Interactive Power Electronics Seminar" for teaching and self-studying power electronics which consists of HTML text where Java-applets (small programs) are inserted which are used for interactive animation and simulation of power electronic circuits and electrical machines.
Abstract: This paper introduces a new software tool "iPES - Interactive Power Electronics Seminar" for teaching and self-studying power electronics. iPES consists of HTML text where Java-applets (small programs) are inserted which are used for interactive animation and simulation of power electronic circuits and electrical machines. The whole tool does need just a standard web-browser and is fully independent of the underlying operating system. No software installation is required, and all interactive Java programs are written with the focus on very easy usage. The tool is available at www.ipes.ethz.ch in English, German and Japanese, can be accessed via the World Wide Web or used with a CD-ROM in a stand-alone PC.

46 citations


01 May 2002
TL;DR: In this article, a detailed analysis of the switching behavior of a CoolMOS/SiC diode combination applied in a 3.5kW single-phase unity power PWM rectifier system is presented.
Abstract: The topic of this paper is a detailed analysis of the switching behavior of a CoolMOS / SiC diode combination applied in a 3.5kW single-phase unity power PWM rectifier system. The focus is on the development of guidelines to accurate measure the switching behavior and the turn-on and turn-off power losses at high switching speeds. Further subjects are the improved design of the power circuit, and the comparison of two high bandwidth current measurement methods applied in the power circuit.

38 citations


Proceedings ArticleDOI
07 Nov 2002
TL;DR: In this article, the conduction losses of the power semiconductors are calculated using analytical approximations of the average and RMS values of the component currents, and the switching losses are taken from experimental investigations where a novel turn-on snubber has been employed.
Abstract: In this paper the current stresses on the power components of a direct three-phase boost-type unity power factor rectifier are analysed in order to provide a basis for a system design under restriction of the height to 2-U. The conduction losses of the power semiconductors are calculated using analytical approximations of the average and RMS values of the component currents. The switching losses are taken from experimental investigations where a novel turn-on snubber has been employed. Based on this data an overview of the estimated power losses is given for a rectifier system of 10.5 kW/800 VDC output for 320 V/400 V/480 V/530 V (RMS, line-to-line) mains voltage. Corresponding efficiency figures are calculated and the improvement achieved by the turn-on snubber as compared to hard switching is determined. The snubber topology and operating principle is discussed in detail. Finally, the theoretical results are verified by experimental investigation of a system prototype.

25 citations


Proceedings ArticleDOI
07 Aug 2002
TL;DR: In this article, the buck-type unity power factor rectifier with integrated DC/DC boost converter output stage is optimized concerning the ripple amplitude of the buckboost inductor current.
Abstract: The modulation of a novel three-phase three-switch buck-type unity power factor rectifier with integrated DC/DC boost converter output stage is optimized concerning the ripple amplitude of the buck-boost inductor current. This is achieved by coordination of the switching operation of the buck input stage and of the boost output stage. A comparative evaluation of different modulation schemes does identify a modulation scheme which simultaneously does provide minimum DC current ripple and minimum input filter capacitor voltage ripple at minimum switching losses and/or maximum pulse frequency. All theoretical considerations are for operation in a wide input voltage range and are verified by simulations and by measurements on a DSP-controlled 5 k W prototype of the system.

19 citations


Proceedings ArticleDOI
07 Aug 2002
TL;DR: In this paper, the time behavior of the mains phase currents iN,i, i.e. of the input filter inductor currents of a practical system was obtained by averaging the discontinuous rectifier input currents over one pulse half period.
Abstract: For the sake of simplicity no LC input filter was considered but the input voltage has been assumed to be directly applied to the converter input. There, the time behavior of the mains phase currents iN,i, i.e. of the input filter inductor currents of a practical system was obtained by averaging the discontinuous rectifier input currents over one pulse half period. The simulation results are compiled in Fig.19, where (d) shows the purely sinusoidal behavior of input and output quantities. The local average a i of the rectifier stage input phase current ia is lying in phase with the corresponding mains phase voltage ua , accordingly the system shows ohmic fundamental mains behavior (cf. Eq.(4)) As Fig.19(a) clearly shows, each power transistor is clamped within a π/3-wide interval of an input and/or output fundamental period what is indicated by a voltage across the power transistors of bpb S u = 0 and/or Bn S u = 0. In Fig.19(f) the time behavior of the DC link current i is given where i>0, and/or i=i+, i− is valid (cf. Eq.(50)), according to the output power factor of cos Φ2=0.961 (cf. Fig.19(d), load phase displacement of Φ2 < π/6). VIII. PRACTICAL REALIZATION

19 citations


Proceedings ArticleDOI
G. Laimer1, Johann W. Kolar1
07 Nov 2002
TL;DR: In this paper, a current sensor employing a Hall-based field sensing ASIC in combination with a current transformer is proposed, characterized by a measuring range of /spl plusmn/50 A, an upper bandwidth limit of 20 MHz and high dV/dt-immunity up to 10 kV/spl mu/s.
Abstract: A current sensor employing a Hall-based field sensing ASIC in combination with a current transformer is proposed. The sensor is characterized by a measuring range of /spl plusmn/50 A, an upper bandwidth limit of 20 MHz and high dV/dt-immunity up to 10 kV//spl mu/s. The sensor functional principle and dimensioning are discussed in detail. Parameters determining the sensor bandwidth are clarified, the theoretical considerations are verified by experiments. Finally, measures for further increasing the sensor bandwidth are proposed.

Proceedings Article
01 Sep 2002
TL;DR: In this article, a novel concept for the analytical calculation of the current stresses on the power semiconductors of the Sparse Matrix Converter Topologies (SMC, VSMC, and USMC) is proposed.
Abstract: For three-phase AC-AC power conversion a conventional matrix converter (CMC) or a DC side connection of a current DC link rectifier and a voltage DC link inverter comprising no energy storage components in the DC link could be employed. The combination of DC converters does show a lower number of turn-off power semiconductors and, therefore, has been denoted as Sparse Matrix Converter (SMC) or Very Sparse Matrix Converter (VSMC). A limitation of the phase displacement of the current and voltage fundamentals at the input and at the output to ±π/6 does allow a further reduction of the system complexity, the respective circuit topology has been introduced as Ultra Sparse Matrix Converter (USMC) in the literature. In this paper a novel concept for the analytical calculation of the current stresses on the power semiconductors of the Sparse Matrix Converter Topologies (SMC, VSMC, and USMC) is proposed. Furthermore, the switching losses of the output stage which shows identical structure for the SMC, VSMC and USMC are calculated analytically based on an experimentally determined dependency of the switching loss energy on the switching voltage and current. As a comparison to a digital simulation shows, the analytical results do show a very good accuracy in a wide modulation range and for widely varying load current phase angle and widely varying ratio of output and mains frequency and therefore do provide an excellent basis for the dimensioning of the SMC, VSMC or USMC and/or for the determination of the rated output power and efficiency which could be achieved by employing given power transistors and diodes.

Proceedings ArticleDOI
07 Nov 2002
TL;DR: In this article, the parasitic effects being responsible for the low-frequency distortions of DC output voltage and/or current are analyzed analytically and quantified for different operating conditions, and the minimization of the influence of the parasitic effect by proper pre-control is discussed.
Abstract: According to the experimental analysis of a 5 kW wide input voltage range three-phase three-switch buck-derived unity power factor PWM rectifier, the ideally constant DC output current does show a low-frequency distortion for open-loop control operation which is translated into low-frequency harmonics of the mains current. This distortion cannot be eliminated completely by closed-loop control since the controller bandwidth has to be limited for stability reasons and/or in order to avoid an excitation of the LC input filter. In this paper the parasitic effects being responsible for the low-frequency distortions of DC output voltage and/or current are analyzed analytically and quantified for different operating conditions. Furthermore, the minimization of the influence of the parasitic effects by proper pre-control is discussed. All theoretical considerations are confirmed by digital simulations.

Proceedings ArticleDOI
07 Aug 2002
TL;DR: Four representative Java applets dealing with the main aspects of space vector calculus are described in detail in this paper and do provide a smooth introduction into the topic for beginners.
Abstract: In the field of power electronics and electrical machines space vector theory is of paramount importance for a detailed understanding of three-phase systems. However, students frequently do have problems with getting a clear picture of all advantages of the space vector concept and, therefore, often do consider space vector calculus to be of limited practical applicability. A part of the new web-based educational software iPES (Interactive Power Electronics Seminar) focusing on space vector calculus could provide a solution to this problem. Four representative Java applets dealing with the main aspects of space vector calculus are described in detail in this paper. The applets do allow the student to explore the basic rules of space vector transformation in an interactive and animated way. Furthermore, the student does get experience with the application of space vector calculus for analysing a three-phase PWM converter, and finally has to manage space-vector-based current control of a three-phase PWM converter system. All applets are easy to use and do provide a smooth introduction into the topic for beginners.

Journal Article
TL;DR: The aim of this paper is to give an introduction to the iPES-project and to show the different areas covered, which could be used for on-line learning and could easily be integrated into an e-learning platform.
Abstract: This paper introduces the Interactive Power Electronics Seminar - iPES - a new software package for teaching of fundamentals of power electronic circuits and systems iPES is constituted by HTML text with Java applets for interactive animation, circuit design and simulation and visualization of electromagnetic fields and thermal issues in power electronics It does comprise an easy-to-use self-explaining graphical user interface The software does need Just a standard web-browser, ie no installations are required iFES can be accessed Via the World Wide Web or from a CD-ROM in a stand-alone PC by students and professionals Due to the underlying software technology IPES IS very flexible and could be used for on-line learning and could easily be integrated into an e-learning platform The aim of this paper is to give an introduction to the iPES-project and to show the different areas covered The e-learning software is available at no costs at www mesethzch in English, German, Japanese, Korean, Chinese and Spanish The project is still under development and the web page is updated m about 4 weeks intervals

Proceedings ArticleDOI
10 Dec 2002
TL;DR: In this paper, the parallel connection of two three phase buck-type unity power factor rectifier systems is investigated experimentally for a 10 kW DSP-controlled prototype, where a space vector modulation scheme is employed which shows all advantages of interleaved operation of the two systems.
Abstract: In this paper the parallel connection of two three phase buck-type unity power factor rectifier systems is investigated experimentally for a 10 kW DSP-controlled prototype. There, a space vector modulation scheme is employed which shows all advantages of interleaved operation of the two systems. Three control schemes for active DC-side current balancing are described. The control schemes do differ concerning their control action and concerning additional switching losses. All control structures discussed in this paper are based on employing an additional free-wheeling states which do allow influence of the rate of change of the DC-side currents and can therefore be used for DC-side current balancing.

Proceedings ArticleDOI
07 Aug 2002
TL;DR: In this paper, a control concept for a unity power factor three-phase AC/DC two-stage telecommunications power supply system is proposed, which is formed by an input-side delta-connection of three single-phase modules with parallel connected DC outputs.
Abstract: In this paper, a novel control concept for a unity power factor three-phase AC/DC two-stage telecommunications power supply system is proposed. The system is formed by an input-side delta-connection of three single-phase modules with parallel connected DC outputs. The control concept features output voltage control, module load sharing and mains voltage proportional guidance of the input currents and does allow to continue in operation also in case of heavily unbalanced mains voltage condition like those given for a missing mains phase or in case of an earth-fault of a mains phase or for a short circuit between two mains phases.

01 Jan 2002
TL;DR: In this article, the authors compared the performance of different bidirectional, bipolar switches with respect to the operational conditions in the sparse matrix converter (SMC) in the presence of different topologies and semiconductors.
Abstract: Bidirectional, bipolar switches up to now consisted of a combination of known power semiconductor switches - such as IGBTs and diodes - in differenttopologies; novel power semiconductor switches - such as reverse blocking or reverse conducting IGBTs - permit to simplify these circuits. The approach of this paper is to dene equally sized components incorporating the different topologies and semiconductors. It is thus possible to directly compare those various bidirectional, bipolar switches. An assessment of their properties is given with respect to the operational conditions in the sparse matrix converter.