Current collapse measurements have been performed for AlGaN/GaN high-electron-mobility transistors having identical breakdown voltages but with different field plate (FP) lengths. The results indicated that applying more positive ON-state gate biases resulted in pronounced recovery in the dynamic ON-resistance for the FP device, whereas no gate-bias effects were observed for the device without FP. The mechanism responsible for the reduced current collapse by FP is proposed, in which the key role is played during ON-state by the quick field-effect recovery of partial channel depletion caused by electron trapping at AlGaN surface states between gate and drain.

Current Collapse Suppression by Gate Field-Plate in AlGaN/GaN HEMTs Md.

With the increasing power density and reduced size of the GaN-based electronic power converters, the heat dissipation in the devices becomes the key issue toward the real applications. Diamond, wit...

Diamond as the heat spreader for the thermal dissipation of GaN-based electronic devices

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OS) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Amongst, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low temperature processibility with conventional complementary metal oxide semiconductor-compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high-end liquid crystal display devices and has now become a standard backplane electronic for organic light-emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next generation electronics such as back-end-of-line transistor applications in monolithic three-dimensional integration beyond the display applications, however, there is still much room to be studied such as high mobility, imune short-channel effects, and low electrical contact properties etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next generation electronics are discussed. This article is protected by copyright. All rights reserved.

Progress, Challenges, and Opportunities in Oxide Semiconductor Devices: A Key Building Block for Applications Ranging from Display Backplanes to 3D Integrated Semiconductor Chips.

Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are excellent materials for the next generation of high-power and high-frequency electronic devices. In fact, their wide band gap (>3 eV) and high critical electric field (>2 MV/cm) enable superior performances to be obtained with respect to the traditional silicon devices. Hence, today, a variety of diodes and transistors based on SiC and GaN are already available in the market. For the fabrication of these electronic devices, selective doping is required to create either n-type or p-type regions with different functionalities and at different doping levels (typically in the range 1016–1020 cm−3). In this context, due to the low diffusion coefficient of the typical dopant species in SiC, and to the relatively low decomposition temperature of GaN (about 900 °C), ion implantation is the only practical way to achieve selective doping in these materials. In this paper, the main issues related to ion implantation doping technology for SiC and GaN electronic devices are briefly reviewed. In particular, some specific literature case studies are illustrated to describe the impact of the ion implantation doping conditions (annealing temperature, electrical activation and doping profiles, surface morphology, creation of interface states, etc.) on the electrical parameters of power devices. Similarities and differences in the application of ion implantation doping technology in the two materials are highlighted in this paper.

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Ion Implantation Doping in Silicon Carbide and Gallium Nitride Electronic Devices

Normally-off AlGaN/GaN MIS-HEMTs with a high threshold voltage (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\text {th}}$ </tex-math></inline-formula>) more than 2.5 V and a low on- resistance of <inline-formula> <tex-math notation="LaTeX">$5.5\Omega \cdot $ </tex-math></inline-formula>mm have been achieved by an improved regrowth technique with <italic>in-situ</italic> SiN<italic>x</italic> passivation. A thin-barrier heterojunction was used to decrease the two-dimensional electron gas (2DEG) underneath the gate, then regrown Al0.2Ga0.8N and <italic>in-situ</italic> SiN<italic>x</italic> were applied to recover 2DEG at the access regions and reduce contact resistance. The O3-based Al2O3 and HfO2 were employed to cover the recessed-gate with low channel sheet resistances by atomic layer deposition. The other hybrid MIS-HEMT with <italic>in-situ</italic> SiN<italic>x</italic> gate interlayer also enabled a normally-off operation with a <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\text {th}}$ </tex-math></inline-formula> hysteresis lower than 30 mV. The damage-free recessed-gate structures with in- situ SiN<italic>x</italic> as passivation and gate dielectric contribute to reducing surface scattering and interface states, resulting in a high <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\text {th}}$ </tex-math></inline-formula> uniformity and channel mobility, low on- resistance andth hysteresis in normally-off GaN-based MIS-HEMTs.

Normally-OFF AlGaN/GaN MIS-HEMTs With Low RON and Vth Hysteresis by Functioning In-situ SiNx in Regrowth Process

Recent Advances in GaN‐Based Power HEMT Devices

We present a novel p-GaN gate HEMT structure with reduced hole concentration near the Schottky interface by doping engineering in MOCVD, which aims at lowering the electric field across the gate. By employing an additional unintentionally doped GaN layer, the gate leakage current is suppressed and the gate breakdown voltage is boosted from 10.6 to 14.6 V with negligible influence on the threshold voltage and on-resistance. Time-dependent gate breakdown measurements reveal that the maximum gate drive voltage increases from 6.2 to 10.6 V for a 10-year lifetime with a 1% gate failure rate. This method effectively expands the operating voltage margin of the p-GaN gate HEMTs without any other additional process steps.

Kai Cheng

Papers

Recent Advances in GaN‐Based Power HEMT Devices

Improved Gate Reliability of p-GaN Gate HEMTs by Gate Doping Engineering